Evaluation system for analog-digital or digital-analog converter

ABSTRACT

There is provided an evaluation system for an A-D converter or a D-A converter capable of evaluating factors of a compounded fault and measuring an effective number of bits with a high accuracy and with a reduced volume of computation, independently of a testing frequency. A sine wave signal is applied to an A-D converter under test. Maximal or minimal values of a cosine wave component and a sine wave component in the converted output are aligned. A square root of a sum of squares of samples is formed to determine an instantaneous amplitude. The amplitude of the sine wave signal is interleaved into the series of instantaneous amplitudes. A difference series for the interleaved instantaneous amplitude series is formed by digital moving differentiator means. Alternatively, a Wavelet transform is applied to the interleaved instantaneous amplitude series, and a maximum amplitude therein is detected by a peak finder, and the detected value is delivered as representing an estimated effective number of bits.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an evaluation system for evaluating theperformance of an analog-digital converter (A-D converter) whichconverts an analog signal into a digital signal or a digital-analogconverter (D-A converter) which converts a digital signal into an analogsignal, and more particularly, to a performance evaluation system forevaluating the effective number of bits of an A-D converter or D-Aconverter which is implemented by a single semiconductor integratedcircuit or a combination of a plurality of semiconductor integratedcircuits.

2. Description of the Related Art

A method of evaluating an A-D converter (hereinafter, referred to asADC) is categorized into a static characteristic evaluation method and adynamic characteristic evaluation method. According to the staticcharacteristic evaluation method, a precisely defined direct current(dc) voltage is applied to an ADC which is a device under test (DUT),and a response from the ADC is observed, and thereafter, “a differencebetween the transition voltage of an actual ADC and the transitionvoltage of an ideal ADC” is estimated in a computer or the like usingthe differential nonlinearity (DNL) or the like.

The differential nonlinearity (DNL) in this case is a result of thecomparison of a difference (actual step width) between the upper limitamplitudes of an analog signal which causes an ADC to output adjacentquantized codes therefrom when applied to the ADC, with an ideal stepwidth which corresponds to 1 LSB, and enables a localized fault ordefect which depends on a particular code to be detected. That is, DNLfor an ADC is defined as follows:

DNL=A _(in)(Q _(m+1))−A _(in)(Q _(m))−1[LSB]  (1)

where Q_(m+1) and Q_(m) are two adjacent quantized codes andA_(in)(Q_(n)) is the upper limit of the amplitude of an analog signalwhich corresponds to the quantized code Q_(n). For example, if “thedifference between adjacent transition amplitudes” remains constant andequals the step size (width) corresponding to 1 LSB, then DNL is zero.

However, the static characteristic evaluation method cannot measure ordetermine the nonlinearity of an ADC which is a device under test whichdepends on the frequency of a signal to be applied to the ADC.

According to the dynamic characteristic evaluation method, a periodicsignal is applied to an ADC which is a device under test, and a responsefrom the ADC is observed, and thereafter, “a difference between thetransition voltage of an actual ADC and the transition voltage of anideal ADC” is estimated in a computer or the like.

This method has an advantage that a characteristic which closelyapproximates an actual operation of the ADC to be tested can beestimated. Particularly, dynamic characteristic evaluation techniqueswhich utilize a sine wave (sinusoidal wave) as an input signal include ahistogram approach, an FFT approach and a curve fitting approach asmentioned below.

(a) In the histogram approach, a histogram is plotted against eachquantized code from a digital waveform of the response from the ADC. Adifference between the histogram of an actual ADC and the histogram ofan ideal ADC is then determined and divided by the histogram of theideal ADC to estimate DNL. The normalization of the difference in thehistograms or its division by the histogram of the ideal ADC accountsfor a non-uniform distribution of the sine wave histogram.

(b) In the FFT approach, a digital signal representing the response ofthe ADC is Fourier transformed as by FFT (fast Fourier transform), andis separated in the frequency domain into a signal (namely, a frequencyspectrum of the sine wave applied) and noises (namely, a spectrum ofquantization noises or a sum of spectra other than the frequency of thesine wave applied), thus determining a signal-to-noise ratio (SNR).

For example, as shown in FIG. 17A, a sine wave signal from a sine wavegenerator 11 is passed through a low pass filter (LPF) 12 to eliminateunwanted components therefrom before it is fed to a sample-and-holdcircuit 13 where the sine wave signal is sampled periodically and heldtherein for feeding to an ADC 14 under test. A response output from theADC 14 is fed to an FFT unit 15 where it is subject to the fast Fouriertransform to be transformed into a signal in the frequency domain, whichis then fed to an SNR estimator 16. On the basis of a result of the FFTas illustrated in FIG. 17B, the SNR estimator 16 determines thesignal-to-noise ratio SNR by dividing the sine waveform signal componentG_(ss)(f₀) by the noise component:$\sum\limits_{f \neq f_{0}}{G_{nn}(f)}$

If the quantization noise increases in the ADC 14 because of fault, thesignal-to-noise ratio SNR is degraded, increasing the number of bitsamong the total number of bits in the ADC 14 which are influenced by thequantization noise. It is then possible to estimate the effective numberof bits (ENOB) of the tested ADC on the basis of the signal-to-noiseratio observed. The effective number of bits (ENOB) of the tested ADCcan be given by the following equation (2). $\begin{matrix}{{ENOB} = {\frac{{{SNR}\lbrack{dB}\rbrack} - 1.76}{6.02}\lbrack{bits}\rbrack}} & (2)\end{matrix}$

In this case, by changing the frequency f₀ of the sine wave signalapplied, the frequency dependency of ENOB can be measured or determined.

(c) In the curve fitting approach using the sine wave, parameters (suchas frequency, phase, amplitude, offset etc.) of an ideal sine wave arechosen so that the square error between a sampled digital signal and theideal sine wave is minimized. An rms (root-mean-square) error determinedin this manner is compared against the rms error of the ideal ADC havingthe same number of bits to estimate the effective number of bits.

Means for generating an analog signal such as a sine wave is describedin detail in “Theory and Application of Digital Signal Processing” byLawrence R. Rabiner and Bernard Gold; Prentice-Hall, 1975, inparticular, “9.12: Hardware realization of a Digital FrequencySynthesizer”, for example.

A problem with the use of the histogram approach mentioned in the aboveparagraph (a) to estimate the DNL of an ADC with a high precision is avery long time needed for the determination. By way of example, anestimation of the DNL for an 8-bit ADC with a reliability of 99% and foran interval width of 0.01 bit requires 268,000 samples. For a 12-bitADC, as many as 4,200,000 samples are required. (See, for example,“Full-Speed Testing of A/D Converters” by Joey Doernberg, Hae-Seung Leeand David A. Hodges, IEEE Journal of Solid-State Circuits, Vol. SC-19,No. 6, pp. 820-827, 1984.) When the ADC under test exhibits hysteresis,it is likely that any fault therein cannot be detected by using thehistogram approach.

Here it is assumed that when an input signal crosses a given level witha positive gradient, a corresponding code width is enlarged, increasingthe number of observations, while when the input signal crosses thegiven level with a negative gradient, the corresponding code widthshrinks, decreasing the number of observations.

According to the histogram approach, no distinction is made in thedirection in which the input signal changes, and accordingly, the numberof observations for the positive gradient and the number of observationsfor the negative gradient are added together in the number ofobservations. As a result, an increase and a decrease in the number ofobservations cancel each other, and the code width will be one close toa code width for a fault-free ideal ADC. (See, for example, “ClassicalTests are inadequate for Modern High-Speed Converters” by Ray K. Ushani,Datel Application Notes AN-5, 1991.) As a consequence, the DNL which canbe estimated with the histogram approach is a result of comparison of adifference in mean values of output code width against the ideal stepsize corresponding to 1 LSB. In addition, there must be a relationshipother than an integral multiple between the frequency of the input sinewave and the sampling frequency of the ADC. (See, for example, the paperby Joey Doernberg, Hae-Seung Lee and David A. Hodges.)

A problem with the estimation of the effective number of bits by the FTTapproach mentioned in the above paragraph (b) will be considered. Toenable an accurate observation of the noise spectrum from the ADC undertest using the FTT approach, it is necessary that the standard deviation${ɛ\left\lbrack {\hat{G}}_{aa} \right\rbrack} \approx \frac{1}{\sqrt{N}}$

made sufficiently small. (See, for example, J. S. Bendat and A. G.Piersol, 1986.) The number of samples N must be increased at this end.When the number of samples is increased by a factor of 4, the noiselevel will be 6 dB lower. The computation of an FFT requires a number ofreal number multiplications, which is represented by${N \cdot {\log_{2}\left\lbrack \frac{N}{2} \right\rbrack}} - 4$

and a number of real number additions, which is represented by:

3/2N·(log₂ [N]+1)−12

The ADC converts an analog signal into a digital output code inaccordance with the amplitude of the input signal. If the Fouriertransform of the output signal is used in evaluating the conversioncharacteristic of ADC, conversion defects that are localized inindividual output codes cannot be separated. This is because defectspresent within different codes are added together as noise incalculating the rms error. Thus if there is no correlation between thedefects and if different codes are influenced by them, these defectswill be evaluated as “part of noise which coherently influences the samecode.” As a consequence, there is a likelihood that the number ofeffective bits may be underestimated. (See, for example,“Data-converters: Getting to know Dynamic Specs” by Robert E. LeonardJr., Datel Application Notes AN-3.) At the same time, an analysis ofindividual factors which cause a reduction in the effective number ofbits such as DNL, integral nonlinearity (INL), aperture jitter or noiseis prohibited. Thus, the effective number of bits which can be estimatedby this approach is not an instantaneous value which corresponds to eachoutput code, but is a mean value determined over the entire outputcodes. Moreover, there is a need to provide a relationship other than anintegral multiple between the frequency of the input sine wave and thesampling frequency of the ADC in order to randomize the quantizationerror. (See, for example, “Integrated Analog-to-Digital andDigital-to-Analog Converters” by Rudy van der Plassche, Kluwer AcademicPublishers, 1994.)

Finally, a problem with the curve fitting approach mentioned in theabove paragraph (c) will be considered. With this approach, it isnecessary to estimate the parameters of the ideal sine wave by themethod of least squares.

(1) To estimate the frequency of the ideal sine wave, the Fouriertransform takes place only for a single presumed frequency to determinethe power. When the power reaches a maximal value, the frequency isestimated. The maximal value cannot be found unless the frequencyestimation is repeated at least three times. Thus, this requires 9N(where N represents the number of samples) real number multiplicationsand (6N−3) real number additions.

(2) The estimation of the phase requires 2N real number multiplications,(2N−2) real number additions, one real number division and onecalculation of arctangent.

(3) The estimation of the amplitude requires 2N real numbermultiplications, (2N−2) real number additions and one real numberdivision.

Where the operation of the ADC under test largely departs from itsnormal operation or where the digital waveform from the ADC under testcontains a reduced number of samples, the square error does not approacha given value if the calculation of the square error is effected whilechanging the parameter of the sine wave. Thus, the error diverges ratherthan converges. To give an example, since the variance of the frequencyestimate is proportional to 1/N³, a sufficiently great number ofsamples, in excess of 4096 samples, are necessary to suppress thevariance. The effective number of bits which can be estimated by thisapproach corresponds again to a mean value determined over the entireoutput codes. As a consequence, an analysis of individual factors suchas harmonic distortion, noise or aperture jitter which causes areduction in the effective number of bits is prohibited. In addition,there must be a relationship other than an integral multiple between thefrequency of the input sine-wave and the sampling frequency of the ADC.If the sampling frequency were an integral multiple of the frequency ofthe input sine wave, the input signal would become coherent to thesampling, with consequence that only a specific quantization level wouldbe tested. (See, for example, the paper by Ray K. Ushani.)

Problems with the prior art techniques for evaluation of dynamiccharacteristics of the ADC can be summarized as the following:

The DNL or the effective number of bits estimated according to anytechnique represents a mean value rather than an instantaneous value.Accordingly, it is difficult to estimate independently factors of acompounded fault. In the process of estimating the effective number ofbits for an ADC which uses a sine wave as an input signal, arelationship other than an integral multiple must be established betweenthe frequency of the input sine wave and the sampling frequency of theADC. For this reason, an arbitrary frequency cannot be selected as thetesting frequency. In addition, a very large number of samples arerequired for any technique chosen. Assuming a number of samples equal to512, the volume of computation needed is as follows:

FFT approach: 4092 real number multiplications and 7668 real numberadditions;

curve fitting approach: 6656 real number multiplications and 4092 realnumber additions.

Like the case of the ADC, the method of evaluating the performance of aD-A converter (hereinafter, referred to as DAC) is also categorized intoa static characteristic evaluation method and a dynamic characteristicevaluation method. According to the static characteristic evaluationmethod, a ramp waveform digital signal pattern is applied to a DAC whichis a device under test (DUT), and a response from the DAC is observed,and thereafter, “a difference between the transition voltage of anactual DAC and the transition voltage of an ideal DAC” is estimated in acomputer or the like using the differential nonlinearity (DNL) or thelike.

The differential nonlinearity (DNL) in this case is a result of thecomparison of a difference in the analog outputs (actual step width) asadjacent digital codes are input to the DAC against an ideal step widthwhich corresponds to 1 LSB, and permits a localized defect which dependson a particular code to be detected. That is, DNL for the DAC is definedas follows:

DNL=S _(out)(C _(m+1))−S _(out)(C _(m))−1[LSB]  (3)

where C_(m+1) and C_(m) are two adjacent digital codes which areinputted to the DAC, and S_(out)(C_(n)) represents an analog outputsignal corresponding to the digital code C_(n). For example, if all of“the difference between analog outputs for adjacent digital codes”remain constant and equal the step size (width) corresponding to 1 LSB,then DNL equals to zero.

However, the static characteristic evaluation method cannot measure ordetermine the nonlinearity of a DAC, which depends on the frequency of asignal to be applied to the DAC.

According to the dynamic characteristic evaluation method, a periodicsignal is applied to a DAC which is a device under test, and a responsefrom the DAC is observed, and thereafter, “a difference between thetransition voltage of an actual DAC and the transition voltage of anideal DAC” is estimated in a computer or the like.

This method has an advantage that a characteristic which closelyapproximates an actual operation of the DAC to be tested can beestimated. In a similar manner to the case of the ADC, dynamiccharacteristic evaluation techniques which utilize a sine wave(sinusoidal wave) as an input signal particularly include a histogramapproach, an FFT approach and a curve fitting approach mentioned below.

(a) In the histogram approach, a histogram is plotted against eachquantized code from an analog waveform of the response from the DAC,which is digitalized by a high precision ADC. A difference between thehistogram of an actual DAC and the histogram of an ideal DAC is thendetermined and is then divided by the histogram of the ideal DAC toestimate DNL. A normalization of the difference in the histograms by itsdivision by the histogram of the ideal DAC accounts for a non-uniformdistribution of the sine wave histogram.

(b) In the FFT approach, an analog waveform representing the response ofthe DAC is digitalized with a high precision ADC and subjected to aFourier transform as by FFT, and is separated in the frequency domaininto a signal (namely, a frequency spectrum of the sine wave applied)and noises (namely, a sum of spectra other than sine wave applied), thusdetermining a signal-to-noise ratio (SNR).

For example, as shown in FIG. 25, a digital signal of a sine wave from apattern generator 111 is applied to a DAC under test (DUT) 112, and ananalog signal delivered from the DAC 112 is supplied to a high precisionADC 113, which converts it into a digital signal of a high precision.This digital signal is fed to an FFT unit 114 where a fast Fouriertransform takes place to transform it into a signal in a frequencydomain, whereupon it is fed to an SNR (signal-to-noise ratio) estimator115. On the basis of a result of the FFT as illustrated in FIG. 17B, theSNR estimator 115 determines the signal-to-noise ratio SNR by dividingthe sine wave signal component G_(ss)(f₀) applied to the DAC 112 by thenoise component: $\sum\limits_{f \neq f_{0}}{G_{nn}(f)}$

If the quantization noise or conversion error increases in the DAC 112because of fault, the signal-to-noise ratio SNR is degraded, increasingthe number of bits among the total number of bits in the DAC 112 whichare influenced by the quantization noise or conversion error. It is thenpossible to estimate the effective number of bits (ENOB) of the testedDAC on the basis of the signal-to-noise ratio observed. The effectivenumber of bits (ENOB) of the DAC can be given by the following equation(4). $\begin{matrix}{{ENOB} = {\frac{{{SNR}\lbrack{dB}\rbrack} - 1.76}{6.02}\lbrack{bits}\rbrack}} & (4)\end{matrix}$

In this case, by changing the frequency f₀ of the sine wave signalapplied, the frequency dependency of ENOB can be measured or determined.

(c) In the curve fitting approach with the sine wave, parameters (suchas frequency, phase, amplitude or offset) of an ideal sine wave arechosen so that the square error between a sampled digital signal and theideal sine wave is minimized. An rms (root-mean-square) error determinedin this manner is compared against the rms error of the ideal DAC havingthe same number of bits to estimate the effective number of bits.

Means for generating an analog signal such as a sine wave is describedin detail in “Theory and Application of Digital Signal Processing” byLawrence R. Rabiner and Bernard Gold; Prentice-Hall, 1975, inparticular, “9.12: Hardware realization of a Digital FrequencySynthesizer”, for example. By substituting a digital fitter for theanalog filter shown in this literature, distortion components in thesine wave can be eliminated.

A problem with the use of the histogram approach mentioned in the aboveparagraph (a) to estimate the DNL of a DAC with a high precision is avery long time needed for the determination. By way of example, anestimation of the DNL for an 8bit DAC with a reliability of 99% and foran interval width of 0.01 bit requires 268,000 samples. For a 12-bitDAC, as many as 4,200,000 samples are required. (See, for example,“Full-Speed Testing of A/D Converters” by Joey Doernberg, Hae-Seung Leeand David A. Hodges, IEEE Journal of Solid-State Circuits, Vol. SC-19,No. 6, pp. 820-827, 1984.) When the DAC under test has hysteresis, it islikely that any fault therein cannot be detected by using the histogramapproach.

Here it is assumed that when an input signal crosses a given level witha positive gradient, a corresponding code width is enlarged, increasingthe number of observations, while when the input signal crosses thegiven level with a negative gradient, the corresponding code widthshrinks, decreasing the number of observations.

According to the histogram approach, no distinction is made in thedirection in which the input signal changes, and accordingly, the numberof observations for the positive gradient and the number of observationsfor the negative gradient are added together in the number ofobservations. Hence, an increase and a decrease in the number ofobservations cancel each other, and the code width will be one close toa code width for a fault-free ideal DAC. (See, for example, “ClassicalTests are inadequate for Modern High-Speed Converters” by Ray K. Ushani,Datel Application Notes AN-5, 1991.) As a consequence, the DNL which canbe estimated with the histogram approach is a result of comparison of adifference in mean values of output code widths against the ideal stepsize corresponding to 1 LSB. In addition, there must be a relationshipother than an integral multiple between the frequency of the input sinewave and the sampling frequency of the DAC. (See, for example, the citedpaper by Joey Doernberg, Hae-Seung Lee and David A. Hodges.)

A problem with the estimation of the effective number of bits by the FTTapproach mentioned in the above paragraph (b) will be considered. Toenable an accurate observation of the noise spectrum from the DAC undertest using the FTT approach, it is necessary that the standard deviation${ɛ\left\lbrack {\hat{G}}_{aa} \right\rbrack} \approx \frac{1}{\sqrt{N}}$

be made sufficiently small. (See, for example, J. S. Bendat and A. G.Piersol, 1986.) The number of samples N must be increased at this end.When the number of samples is increased by a factor of 4, the noiselevel will be 6 dB lower. The computation of FFT requires a number ofreal number multiplications, which is represented by:${N \cdot {\log_{2}\left\lbrack \frac{N}{2} \right\rbrack}} - 4$

and a number of real number additions, which is represented by:

3/2N·(log₂ [N]+1)−12

The DAC converts a digital code in the input signal into an analogsignal for delivery. If the Fourier transform of the output signal isused in evaluating the conversion characteristic of DAC conversiondefects that are localized in individual input codes cannot beseparated. This is because defects which correspond to respectivedifferent codes only will be added together as noise in calculating therms error. Thus even if there is no correlation between the defects andif different analog signal level in the output are influenced by them,these defects will be evaluated as “part of the noise which coherentlyinfluences the same analog signal”. As a consequence, there is alikelihood that the number of effective bits may be underestimated.(See, for example, “Data converters: Getting to know Dynamic Specs” byRobert E. Leonard Jr., Datel Application Notes AN-3.) At the same time,an analysis of individual factors which cause a reduction in theeffective number of bits such as DNL, integral nonlinearity (INL),glitch or noise is prohibited. Thus, the effective number of bits whichcan be estimated by this approach is not an instantaneous value whichcorresponds to each input code, but is a mean value determined over theentire output codes. Moreover, there is a need to provide a relationshipother than an integral multiple between the frequency of the input sinewave and the sampling frequency of the DAC in order to randomize theconversion error. (See, for example, “Integrated Analog-to-Digital andDigital-to-Analog Converters” by Rudy van der Plassche, Kluwer AcademicPublishers, 1994.)

Finally, a problem with the curve fitting approach mentioned in theabove paragraph (c) will be considered. With this approach, it isnecessary to estimate the parameter of the ideal sine wave by the methodof least squares.

(1) To estimate the frequency of the ideal sine wave, the Fouriertransform takes place only for a single presumed frequency to determinethe power. When the power reaches a maximal value, the frequency isestimated. The maximal value cannot be found unless the frequencyestimation is repeated at least three times. Thus, this requires 9N(where N represents the number of samples) real number multiplicationsand (6N−3) real number additions.

(2) The estimation of the phase requires 2N real number multiplications,(2N−2) real number additions, one real number division and onecalculation of arctangent.

(3) The estimation of the amplitude requires 2N real numbermultiplications, (2N−2) real number additions and one real numberdivision.

Where the operation of the DAC under test largely departs from itsnormal operation or where the analog waveform from the DAC under testcontains a reduced number of samples, the square error does not approacha given value if the calculation of the square error is repeated whilechanging the parameter of the sine wave. Thus, the error diverges ratherthan converges. To give an example, since the variance of the frequencyestimate is proportional to 1/N³, a sufficiently great number ofsamples, in excess of 4096 samples, are necessary to suppress thevariance. The effective number of bits which can be estimated by thisapproach also corresponds to a mean value determined over the entireinput codes. As a consequence, an analysis of individual factors such asharmonic distortion, noise or glitch which causes a reduction in theeffective number of bits is prohibited. In addition, there must be arelationship other than an integral multiple between the frequency ofthe input sine wave and the sampling frequency of the ADC. If thesampling frequency were an integral multiple of the frequency of theinput sine wave, the input signal would be coherent to the sampling,with consequence that only a specific quantization level would betested. (See, for example, the paper by Ray K. Ushani.)

Problems with the prior art technique for evaluation of dynamiccharacteristics of the DAC can be summarized as follows:

The DNL or the effective number of bits estimated according to anytechnique represents a mean value rather than an instantaneous value.Accordingly, it is difficult to estimate independently factors of acompounded fault. In the process of estimating the effective number ofbits for a DAC which uses a sine wave as an input signal, a relationshipother than an integral multiple must be established between thefrequency of the input sine wave and the sampling frequency of the DAC.For this reason, an arbitrary frequency cannot be selected as thetesting frequency. In addition, a very large number of samples arerequired for any technique chosen. Assuming a number of samples equal to512, the volume of computation needed is as follows:

FFT approach: 4092 real number multiplications and 7668 real numberadditions;

curve fitting approach: 6656 real number multiplications and 4092 realnumber additions.

SUMMARY OF THE INVENTION

It is a first object of the present invention to provide an ADCevaluation system which is capable of independently dealing withindividual factors of a compounded fault and of enabling an estimationof an instantaneous effective number of bits.

It is a second object of the present invention to provide a system forevaluation of an effective number of bits of an ADC which permits anarbitrary choice of a testing frequency.

It is a third object of the present invention to provide a system forevaluating the effective number of bits of an ADC which can beimplemented by simple hardware.

It is a fourth object of the present invention to provide an ADCevaluation system which is capable of estimating the effective number ofbits with high accuracy without increasing the length of testing time.

It is a fifth object of the present invention to provide an ADCevaluation system capable of observing an instantaneous effective numberof bits as a function of time.

It is a sixth object of the present invention to provide a DACevaluation system which is capable of independently dealing withindividual factors of a compounded fault and enabling an estimation ofan instantaneous effective number of bits.

It is a seventh object of the present invention to provide a system forevaluating the effective number of bits for DAC in which an arbitrarychoice of a testing frequency is allowed.

It is an eighth object of the present invention to provide a system forevaluating the effective number of bits of a DAC which can beimplemented by simple hardware.

It is a ninth object of the present invention to provide a DACevaluation system which is capable of estimating the effective number ofbits with high accuracy without increasing the length of testing time.

It is a tenth object of the present invention to provide a DACevaluation system which permits an instantaneous observation of aneffective number of bits as a function of time.

In order to accomplish the above objects, in the first aspect of thepresent invention, there is provided an evaluation system for an A-Dconverter comprising: a signal generator for generating an analog signalcorresponding to a sine wave; a timing controller for generating a clockwhich is used in supplying an analog signal to an A-D converter undertest; a waveform memory for storing and accumulating a digital signaloutputted from the A-D converter; instantaneous amplitude calculationmeans for taking out a digital signal stored in the waveform memorytherefrom and determining an instantaneous amplitude; interleave signalproducing means for receiving the instantaneous amplitude and theamplitude of the sine wave as its inputs and forming an interleavesignal in which the instantaneous amplitude and the amplitude of thesine wave are interleaved;.and digital moving differentiator means forreceiving the interleave signal as its input and calculating a movingdifference.

In the second aspect of the present invention, there is provided anevaluation system for an A-D converter comprising: a signal generatorfor generating an analog signal corresponding to a sine wave; a timingcontroller for generating a clock which is used in supplying an analogsignal to an A-D converter under test; a waveform memory for storing andaccumulating a digital signal outputted from the A-D converter;instantaneous amplitude calculation means for taking out a digitalsignal stored in the waveform memory therefrom and determining aninstantaneous amplitude; interleave signal producing means for receivingthe instantaneous amplitude and the amplitude of the sine wave as itsinputs and forming an interleave signal in which the instantaneousamplitude and the amplitude of the sine wave are interleaved; andWavelet transform means-for receiving the interleave signal as its inputand applying a Wavelet transform to the interleave signal.

The evaluation system for an A-D converter may further comprise adigital signal selecting means for selecting and taking out from thewaveform memory either a digital signal that corresponds to a cosinewave or a digital signal the applied signal of which corresponds to asine wave.

The waveform memory may include a plurality of waveform memories forstoring and accumulating the digital signal, and the evaluation systemfor an A-D converter may further comprise: selecting means for selectinga waveform memory which stores and accumulates therein a digital signalcorresponding to a cosine wave or a digital signal corresponding to asine wave; and read-out means for selecting a waveform memory to readout the digital signal stored and accumulated therein.

The evaluation system for an A-D converter may further comprise: atrigger circuit coupled to a write circuit for the waveform memory andgenerating a trigger signal under a specified condition of an inputdigital signal; and control means for taking in a given quantity ofdigital signals on the basis of the trigger signal from the triggercircuit.

The instantaneous amplitude calculation means may comprise:multiplication means for reading a plurality of digital signals from thewaveform memory to derive a square signal of a digital signalscorresponding to the cosine wave and a square signal of a digital signalcorresponding to the sine wave; adder means for adding a plurality ofsquare signals to derive a square amplitude signal; and square rootmeans for forming a square root of the square amplitude signal todetermine an instantaneous amplitude signal.

The digital moving differentiator means may further comprise acombination of absolute value calculating means for determining anabsolute value of a difference signal and maximum value detecting meansfor receiving an absolute value signal as its input and detecting themaximum value thereof.

The digital moving differentiator means may further comprise: a periodmemory which stores the period of a sine wave being applied to the A-Dconverter; and a combination of absolute value calculating means fordetermining an absolute value of a difference signal, and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting a-maximal value thereof in correspondence to the period of thesine wave.

The Wavelet transform means may further comprise a combination ofabsolute value calculating means for determining an absolute value of asignal obtained as a result of the Wavelet transform, and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting the maximum value thereof.

The Wavelet transform means may further comprise: a period memory whichstores the period of a sine wave being applied to the A-D converter; anda combination of absolute value calculating means for determining anabsolute value of a signal obtained as a result of the Wavelettransform, and maximal value detecting means for receiving an absolutevalue signal as its input and detecting a maximal value thereof incorrespondence to the period of the sine wave.

In the third aspect of the present invention, there is provided anevaluation system for a D-A converter comprising: a pattern generatorfor generating a sine wave pattern in the form of a digital signal; atiming controller for generating a clock which is used in supplying thesine wave pattern to a D-A converter under test; an A-D converter havinga higher accuracy of conversion than the D-A converter and operative toconvert an analog signal outputted from the D-A converter to a digitalsignal; a waveform memory for storing and accumulating a digital signaloutputted from the A-D converter; instantaneous amplitude calculationmeans for taking out a digital signal stored in the waveform memorytherefrom and determining an instantaneous amplitude; interleave signalproducing means for receiving the instantaneous amplitude and theamplitude of the sine wave as its inputs and forming an interleavesignal in which the instantaneous amplitude and the amplitude of thesine wave are interleaved; and digital moving differentiator means forreceiving the interleave signal as its input and calculating a movingdifference.

In the fourth aspect of the present invention, there is provided anevaluation system for a D-A converter comprising: a pattern generatorfor generating a sine wave pattern in the form of a digital signal; atiming controller for generating a clock which is used in supplying thesine wave pattern to a D-A converter under test; an A-D converter havinga higher accuracy of conversion than the D-A converter and operative toconvert an analog signal outputted from the D-A converter to a digitalsignal; a waveform memory for storing and accumulating a digital signaloutputted from the A-D converter; instantaneous amplitude calculationmeans for taking out a digital signal stored in the waveform memorytherefrom and determining an instantaneous amplitude; interleave signalproducing means for receiving the instantaneous amplitude and theamplitude of the sine wave as its inputs and forming an interleavesignal in which the instantaneous amplitude and the amplitude of thesine wave are interleaved; and Wavelet transform means for receiving theinterleave signal as its input and applying a Wavelet transform to theinterleave signal.

The evaluation system for a D-A converter may further comprise a digitalsignal selecting means for selecting and taking out from the waveformmemory either a digital signal that corresponds to a cosine wave or adigital signal that corresponds to a sine wave.

The waveform memory may include a plurality of waveform memories forstoring and accumulating the digital signal, and the evaluation systemfor a D-A converter may further comprise: selecting means for selectinga waveform memory which stores and accumulates therein a digital signalpattern corresponding to a cosine wave or a digital signal patterncorresponding to a sine wave; and read-out means for selecting awaveform memory to read out the digital signal stored and accumulatedtherein.

The evaluation system for a D-A converter may further comprise: atrigger circuit coupled to a write circuit for the waveform memory andgenerating a trigger signal under a specified condition of an inputdigital signal pattern, and control means for taking in a given quantityof digital signals on the basis of the trigger signal from the triggercircuit.

The instantaneous amplitude calculation means may comprises:multiplication means for reading a plurality of digital signals from thewaveform memory to derive a square signal of a digital signalscorresponding to the cosine wave and a square signal of a digital signalcorresponding to the sine wave; adder means for adding a plurality ofsquare signals to derive a square amplitude signal; and square rootmeans for forming a square root of the square amplitude signal todetermine an instantaneous amplitude signal.

The digital moving differentiator means may further comprise acombination of absolute value calculating means for determining anabsolute value of a difference signal and maximum value detecting meansfor receiving an absolute value signal as its input and detecting themaximum value thereof.

The digital moving differentiator means may further comprise: a periodmemory which stores the period of a sine wave being applied to the D-Aconverter; and a combination of absolute value calculating means fordetermining an absolute value of a difference signal, and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting a maximal value thereof in correspondence to the period of thesine wave.

The Wavelet transform means may further comprise a combination ofabsolute value calculating means for determining an absolute value of asignal obtained as a result of the Wavelet transform, and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting the maximum value thereof.

The Wavelet transform means may further comprise: a period memory whichstores the period of a sine wave being applied to the D-A converter; anda combination of absolute value calculating means for determining anabsolute value of a signal obtained as a result of the Wavelettransform, and maximal value detecting means for receiving an absolutevalue signal as its input and detecting a maximal value thereof incorrespondence to the period of the sine wave.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating the principle of an ADCevaluation system according to the present invention;

FIG. 2A is a diagram showing an instantaneous amplitude which isestimated from an output from a 4-bit ADC;

FIG. 2B is a diagram showing a single pulse signal;

FIG. 2C is a diagram showing an output from a digital movingdifferentiator in response to the single pulse signal shown in FIG. 2Bas an input;

FIG. 3A is a diagram showing a single pulse signal;

FIG. 3B is a diagram showing a result of a Wavelet transform (using Haarbase) applied to the single pulse signal shown in FIG. 3A;

FIG. 4A is a diagram showing a result of the Wavelet transform (usingHaar base) applied to an instantaneous amplitude which is estimated froman output from 4-bit ADC;

FIG. 4B graphically shows an estimation result of an instantaneous DNLobtained with the ADC evaluation system according to the presentinvention;

FIG. 5 is a block diagram of an essential part of a first embodiment ofthe ADC evaluation system according to the present invention;

FIG. 6 is a block diagram showing an essential part of a secondembodiment of the ADC evaluation system according to the presentinvention;

FIG. 7 is a block diagram showing an essential part of a thirdembodiment of the ADC evaluation system according to the presentinvention;

FIG. 8A is a block diagram of the overall arrangement of one form of theADC evaluation system according to the present invention;

FIG. 8B is a block diagram showing the arrangement of another form ofADC evaluation system according to the present invention;

FIG. 9 is a block diagram showing a memory and parts located therearoundwhich are used in the ADC evaluation system shown in FIG. 8 in detail;

FIG. 10 is a block diagram showing another form of memory and partslocated therearound which are used in the ADC evaluation system shown inFIG. 8 in detail;

FIG. 11 is a circuit diagram showing one specific example of a digitalmoving differentiator used in the present invention;

FIG. 12 is a flow chart illustrating the operation of the Haar Wavelettransform unit;

FIG. 13 is a flow chart showing a part of the operation of DaubechiesWavelet transform unit;

FIG. 14 is a flow chart showing the operation which takes place as acontinuance from the flow chart shown in FIG. 13;

FIGS. 15A-B graphically shows a comparison of real numbermultiplications (between fast Fourier transform and Daubechies Wavelettransform);

FIG. 16 is a diagram showing an example of local maxima of theinstantaneous DNL as a function of time;

FIG. 17A is a block diagram showing one form of an ADC evaluation systemwhich estimates the effective number of bits using a conventionaltechnique;

FIG. 17B is a diagram showing an example of fast Fourier transform of anoutput from the ADC;

FIG. 18 is a block diagram showing the principle of a DAC evaluationsystem according to the present invention;

FIG. 19 is a block diagram of an essential part of a first embodiment ofthe DAC evaluation system according to the present invention;

FIG. 20 is a block diagram showing an essential part of a secondembodiment of the DAC evaluation system according to the presentinvention;

FIG. 21 is a block diagram showing an essential part of a thirdembodiment of the DAC evaluation system according to the presentinvention;

FIG. 22A is a block diagram showing the overall arrangement of one formof the DAC evaluation system according to the present invention;

FIG. 22B is a block diagram showing the overall arrangement of anotherform of DAC evaluation system according to the present invention;

FIG. 23 is a block diagram showing one form of memory and parts locatedtherearound which are used in the DAC evaluation system shown in FIG. 22in detail;

FIG. 24 is a block diagram showing another form of memory and partslocated therearound which are used in the DAC evaluation system shown inFIG. 22 in detail; and

FIG. 25 is a block diagram of an example of a DAC evaluation systemwhich estimates the effective number of bits using a conventional FFTtechnique.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The technique of employing a Fourier transform which represents a meansquare estimator or the curve fitting technique which employs the methodof least squares cannot accomplish the first, the second and the thirdobject of the present invention mentioned above. To accomplish theseobjects, separate means are necessary which are capable of separatingnon-idealities which are localized in respective output codes of an ADC.

To provide means which are capable of separating nonlinearities inaccordance with the present invention, an instantaneous magnitudeestimator 21 which receives a digital signal comprising output codesfrom an ADC as an input signal is used, as shown in FIG. 1.

As is discussed above, in the prior art practice, a combination of aFourier transform unit and an SNR estimator is used to estimateindirectly a mean effective number of bits from an ADC under test.Instead of using such a combination of Fourier transform unit and theSNR estimator, the mean effective number of bits from an ADC under testis directly estimated in accordance with the present invention by usinga combination of instantaneous magnitude estimator 21, an interleaver 20and a digital moving differentiator or Wavelet transform unit 22, and apeak (extreme value, or the maximum value) finder 23.

Specifically, as shown in FIG. 1, in accordance with the presentinvention, a sine wave from a sine wave generator 11 is applied to anADC 14 under test, and an instantaneous amplitude of the output from theADC 14 is calculated by an instantaneous magnitude estimator 21. Thecalculated instantaneous amplitude and a known amplitude of the inputsine wave are fed to an interleaver 20, which produces an interleavedsignal. The interleaved signal from the interleaver 20 is supplied to amoving differentiator or Wavelet transform unit 22 for processingtherein. An absolute magnitude and a maximum value of the output fromthe moving differentiator or Wavelet transform unit 22 is detected by apeak finder 23, and is used to determine the instantaneous effectivenumber of bits for the ADC 14 under test.

As mentioned previously, the FFT technique or the curve fittingtechnique cannot directly determine non-idealities which are localizedin respective localized codes of the ADC under test. For example, in theFFT technique, a digital signal comprising output codes from the ADC issubject to a Fourier transform, and a line spectrum which corresponds toan ideal sine wave in the frequency domain is estimated. A differencespectrum corresponding to the spectrum determined by the Fouriertransform from which the line spectrum is estimated is then determined.Finally, the difference spectrum is made to correspond to non-idealitiesin the ADC under test.

Similarly, when the curve fitting approach is used, a calculation isrepeated so that a square error between a sampled digital waveform andan ideal sine wave is minimized, thus estimating the ideal sine wave.Non-idealities in-the ADC under test are estimated by a differentialvector between the vector of the sampled digital waveform and the vectorof the ideal sine wave.

By contrast, in accordance with the present invention, the use of theinstantaneous amplitude estimator 21 allows non-idealities in therespective output codes in the ADC under test to be determined directly.To simplify the description, it is assumed that the input signalcomprises a cosine wave. A response digital waveform {circumflex over(X)}[n] representing the response from the ADC under test is a sum ofthe input cosine wave and non-idealities e[n] such as quantization errorof the ADC under test and the like.

{circumflex over (X)}[n]=A·cos(2πf ₀ n+Φ)+e[n]  (5)

The response digital signal showing the response of the ADC under testin correspondence to the input cosine wave always contains a sine wave{circumflex over (X)}[m] which is related to the cosine wave and aHilbert transform.

{circumflex over (X)}[m]=H(X[n])+e[m]=A·sin(2πf ₀ n+Φ)+e[m]  (6)

When both {circumflex over (X)}[n] and {circumflex over (X)}[m] areinputted to the instantaneous magnitude estimator 21, the instantaneousmagnitude or amplitude z(n) is calculated and delivered. $\begin{matrix}\begin{matrix}{{z(n)} \equiv \quad \sqrt{{\hat{X}\lbrack n\rbrack}^{2} + {\hat{X}\lbrack m\rbrack}^{2}}} \\{\cong \quad {A + \left\{ {{{e\lbrack n\rbrack} \cdot {\cos \left( {{2\pi \quad f_{0}n} + \Phi} \right)}} + {{e\lbrack m\rbrack} \cdot {\sin \left( {{2\pi \quad f_{0}n} + \Phi} \right)}}} \right\}}}\end{matrix} & (7)\end{matrix}$

For an ideal ADC having an infinite number of bits, e[n] or e[m] isequal to zero, thus providing an envelope of a given amplitude.Conversely, an ADC under test which has a finite number of bits has anenvelope of an error signal as shown in FIG. 2A. This may be regarded ashaving carrier waves represented by the cosine wave and the sine wave inthe input signal which are amplitude modulated in accordance with thenon-idealities e[n] or e[m] of the ADC under test. Accordingly,information representing the fault of the ADC under test appears in theamplitude modulation term of the equation (7).

In the dynamic performance test of the ADC under test, it is of greaterimportance to evaluate the worst value of the effective number of bitsrather than the mean value of the effective number of bits. A maximumvalue or a minimum value of the amplitude modulation signal which isgiven by the equation (7) may be utilized in the estimation of the worstvalue of the effective number of bits.

−Δ/2<e[n]<Δ/2  (8-1)

Thus, a range of the amplitude modulation signal is given as follows:

A−{square root over (2(Δ/2))}< z(n)<A+{square root over (2(Δ/2))}  (8-2)

When evaluating the worst value of the effective number of bits of ADCunder test, a maximal value and a minimal value of the amplitudemodulation signal given by the equation (7) may be utilized to determinethe instantaneous value of the effective number of bits whichcorresponds to the period of input sine wave. For example, the aperturejitter is proportional to a gradient in the input signal to the ADC. Onthe other hand, noises occur without any correlation with the inputsignal. Accordingly, by seeing if the fault which appears in theamplitude modulation signal is periodic, remains constant, or comprisessubstantially constant noise on which a periodic pattern issuperimposed, it is possible to determine if a single fault or acompounded fault prevails.

In this manner, the instantaneous magnitude estimator used in accordancewith the present invention enables a direct determination ofnon-idealities which are localized in the respective output codes of theADC under test.

Assuming that a number of samples is equal to 512, then the volume ofcomputation required will be as follows:

FFT approach: 4092 real number multiplications and 7668 real numberadditions; and

curve fitting approach: 6656 real number multiplications and 512 realnumber additions;

as mentioned previously, whereas in the instantaneous magnitudeestimator, the required volume of computation will be as follows:

1024 real number multiplications and 512 real number additions.

In this manner, the instantaneous magnitude estimator used in accordancewith the present invention is effective to provide a system whichaccomplishes the first, the second and the third objects mentionedabove.

The function and the effect of the digital moving differentiator 22which is used in the present invention will be described.

A single pulse signal 1−Δδ(t−τT) having an amplitude of a quantizationstep width Δ (FIG. 2B) is inputted to the digital moving differentiator22, and only 512 samples are sampled. The impulse signal having anamplitude of the quantization step width Δ corresponds to an output codefrom the ADC. As shown in FIG. 2C, −20 log₁₀ (Δ/2) which is proportionalto the quantization step width of the ADC is observable.

Similarly, a single pulse signal 1−Δδ(t−τ) having an amplitude of thequantization step width Δ is inputted to the Wavelet transform unit 22,and only 512 samples are sampled. As shown in FIG. 3, −20 log₁₀ (Δ/2),−20 log₁₀ (Δ/4), . . . , −20 log₁₀ (Δ/256) which are proportional to thequantization step width of the ADC are observable in multipleresolutions corresponding to 8 scales.

A scale is the reciprocal of the frequency, and it changes from 2⁸ to 2¹in this example. On the other hand, it is seen that there exist 2¹ to 2⁸Wavelets along the time axis. The number of Wavelets which correspondsto the frequency, namely, “m” of 2^(m) is called a level. However, ascale which corresponds to the period, namely, “j” of 2^(j) is called alevel by Martin Vetterli et al.

FIG. 3B shows a result of Wavelet transform which is observed at eachscale level. Accordingly, it is possible to detect whether or not thequantization step size is working-properly by using the digital movingdifferentiator 22 or the Wavelet transform unit 22. On the other hand,if the single pulse signal is subject to the Fourier transform, thespectrum will be spread across the entire frequency band being observed,preventing a detection of whether or not the quantization step signal ofthe ADC is working properly. It will be noted that each logarithmicfrequency zone shown in FIG. 3B, for example, (0,1), (1,2), . . . ,(6,7) and (7,8) allows the entire time range (0 to 250) to be observedin a compressed manner.

Assuming that a number of samples is equal to 512, the required volumeof computation will be as follows.

digital moving differentiator:

1022 real number multiplications and 511 real number additions;

Doubechies-Wavelet transform unit:

4088 real number multiplications and 3066 real number additions.

The function and the effect of the interleaver 20 which is used in thepresent invention will now be described.

When the amplitude modulation signal z(n) given by the equation (7) andthe amplitude A of the cosine wave being applied are inputted to theinterleaver 20, the following signal f is derived:

f≡(A, z(1), A, z(2), . . . , A, z(n), . . . )

The signal f is a train of sub-signals (A, z(n)) or comprises an impulsetrain having a height of A−z(n). It follows from the theory of thesingle pulse signal mentioned above that when the signal f is inputtedto the digital moving differentiator or the Wavelet transform unit 22,the height-of the impulse train can be estimated. A maximum value of theoutput from the digital moving differentiator or moving Wavelettransform unit 22 provides a dynamic range DR of the ADC under test.$\begin{matrix}\begin{matrix}{{DR} \equiv \quad {{- 20}{\log_{10}\left\lbrack {\frac{1}{\sqrt{2}} \cdot \frac{\Delta}{2}} \right\rbrack}}} \\{= \quad {{- 20}{{\log_{10}\left\lbrack \frac{1}{2^{\hat{B} + 0.5}} \right\rbrack}\lbrack{dB}\rbrack}}}\end{matrix} & (9)\end{matrix}$

Conversely, it is possible to estimate the instantaneous effectivenumber of bits B of the ADC under test from the dynamic range DRobserved.

B={DR/(20 log₁₀ 2)}−0.5[bit]  (10)

When the amplitude modulation signal given by the equation (7) is inputto the digital moving differentiator or Wavelet transform unit 22 (FIG.1), the instantaneous effective number of bits can be observed as afunction of time as indicated in FIG. 4A. As a result of determining theabsolute magnitude of the output from the digital moving differentiatoror Wavelet transform unit 22 and supplying it to the peak (the maximumvalue) finder 23, the maximum value which is delivered from the peakfinder 23 corresponds to the effective number of bits. It is alsopossible to estimate the instantaneous effective number of bits fromthis value using the equation (10). By changing the number of bits ofthe ADC under test from 2 to 22, this process of estimating theinstantaneous effective number of bits has been verified. The result isindicated in FIG. 4B where “+” indicates the instantaneous effectivenumber of bits which is estimated when the single pulse signal isinputted while “0” indicates the instantaneous effective number of bitswhich is estimated by inputting the sine wave to the ADC under test andusing the combination of the instantaneous magnitude estimator, thedigital moving differentiator or Haar-Wavelet transform unit, and thepeak finder. In FIG. 4B, “*” indicates the instantaneous effectivenumber of bits which is estimated by inputting the sine wave to the ADCunder test and using the combination of instantaneous magnitudeestimator, the Daubechies-Wavelet transform unit and-the peak finder. Itwill be seen that in each instance, the instantaneous effective numberof bits which corresponds to the number of bits in the ADC under test isestimated.

In this manner, the combination of the instantaneous magnitude estimator21 and the digital moving differentiator or Wavelet transform unit 22which are used in accordance with the present invention provides asystem which accomplishes the fourth and the fifth object mentionedabove.

It will be understood from the foregoing description that theinstantaneous magnitude estimator 21 which is used in the presentinvention functions (1) as an instantaneous effective number of bitsestimator which is capable of independently dealing with factors in acompounded fault, (2) an effective number of bits estimator whichpermits an arbitrary choice of the testing frequency, and (3) aneffective number of bits estimator which can be implemented in a simplehardware.

The combination of the instantaneous magnitude estimator 21 and thedigital moving differentiator or Wavelet transform unit 22 which areused in the present invention functions as (4) an effective number ofbits estimator which achieves a high accuracy of determination withoutincreasing the length of time, and (5) a system which allows theinstantaneous effective number of bits to be observed as a function oftime.

Next, several preferred embodiments of the present invention will bedescribed in detail with reference to the drawings.

FIG. 5 shows the arrangement of an effective number of bits estimatoraccording to the present invention. The arrangement comprises a CPU 31which performs a data entry and delivery as well as a calculation, afloating decimal point calculator chip 32, a keyboard or a front panel33 which is used for entry of parameters or instructions, a display 34which displays a menu selected by a user or a result of determination,and ROM 35, RAM 36 or disk unit which store user input or other data. Inaddition, the arrangement houses a digital moving differentiator 37. Asignal generator 11 for generating an analog signal delivers a sinewave, which is applied to an ADC 14 under test. A timing controller 38produces a clock, which is applied to the ADC 14 to control the timingof the A/D conversion which takes place within ADC 14. A waveform memory(RAM Signal) 39 reads a digital signal which is stored in a buffer 41connected to the output of the ADC 14 in synchronism with the end ofconversion signal from the ADC 14, for example. The waveform memory 39may be of a size of 1024, for example (having a memory address of0-1023). The analog signal generator 11 also generates a trigger signal,which starts a remaining sample counter 42. When the count in thecounter 42 is equal to zero, for example, a switch 43 which couples thebuffer 41 to the waveform memory 39 is turned off, thus terminating thewriting of the digital signal into the waveform memory 39. Assuming thatthe last write address to the waveform memory 39 is 500 (or 1023), thislast write address is read out from an address generator and isincremented by one by the remainder operation, thus providing an addressof 501 (or 0) where the oldest sample is stored. Thus, when the lastwrite address to the waveform memory 39 is read out from the addressgenerator 44 and incremented by one, individual samples can be read outin sequential order beginning with the oldest sample.

The frequency f₀ and the amplitude A of the sine wave, the samplingfrequency f_(S), the highest frequency f_(m) and the pass band of a lowpass filter 12, and a number of remaining samples L which ispredetermined as a trigger condition can be selected by a user andentered through the keyboard 33 or the front panel. These parameters maybe previously written into a file saved in a disc and read from the fileupon commencement of the test. CPU 31 writes these parameters intocontrol registers associated with the signal generator 11, the low passfilter 12 and the waveform memory 39.

FIG. 6 shows the overall arrangement of another form of effective numberof bits estimator according to the present invention, and correspondingparts to those shown in FIG. 5 are designated by like referencecharacters as used in FIG. 5. The arrangement shown in FIG. 6 differsfrom the arrangement shown in FIG. 5 in that the digital movingdifferentiator 37 shown in FIG. 5 is replaced by a Wavelet transformunit 46.

FIG. 7 shows the arrangement of a further form of an effective number ofbits estimator according to the present invention and is distinct fromthe arrangements shown in FIGS. 5 and 6 in that a control computer 48exercises a control over the effective number of bits estimator. Thecomputer may comprise SPARC computer available from Sun Microsystems.This computer has the functions of CPU 31, the floating decimal pointcalculator chip 32, the keyboard 33, the display 34, ROM 35, RAM 36, theinterleaver, the digital moving differentiator 37 and the Wavelettransform unit 46.

Embodiment 1

FIG. 8A shows a schematic view of an effective number of bits estimatoraccording to the present invention, which functions to estimate aneffective number of bits of an ADC 14 which internally contains asample-and-hold circuit. A signal generator 11 which generates an analogsignal provides a sine wave, which is applied to the ADC 14 under test.A timing controller 38 produces a clock which is applied to the ADC 14for controlling the timing of the A/D conversion operation thereof. Awaveform memory 39 accumulates a digital signal from the ADC 14 insynchronism with an end of conversion signal from the ADC 14, forexample. An instantaneous magnitude estimator forms a pair of suitabledata {circumflex over (X)}[n] and {circumflex over (X)}[m] in an arrayof digital waveform taken therein and determines a sum of squaresthereof in accordance with the equation (7) and also forms a square rootof the sum of the squares to calculate an instantaneous amplitude z(n).

An interleaver 20 receives a train of such instantaneous amplitudes asan input, and produces an interleaved signal from the amplitude A of thesine wave and the train of instantaneous amplitudes. The interleavedsignal is supplied to a digital moving differentiator 37 as an input,which then operates to calculate a moving difference, thus sequentiallydelivering a difference between a current input value and an immediatelypreceding input value. Since the input interleaved signal is formed inthe sequence of ( . . . A, z(n), A, . . . ), it will be seen that adifference having the same absolute value |A−z(n)| is delivered twotimes in succession. Accordingly, the digital moving differentiator 37is arranged to deliver only one sample every two samples, thusdelivering the absolute magnitude |A−z(n)| only once. To summarize, theinstantaneous amplitude comprising M samples is input to the interleaver20, the output of which is processed by the digital movingdifferentiator 37, thus delivering a number of samples which are equalto M as an output. The array of difference signals is input to a peakfinder 23 in order to detect and deliver a maximum amplitude. When alogarithm of the detected maximum amplitude is formed and is substitutedinto the equation (10) as a dB value, an instantaneous effective numberof bits B can be estimated.

As indicated in parentheses in FIG. 8A, the moving differentiator 37 maybe replaced by a Wavelet transform unit 46.

Embodiment 2

FIG. 8B shows another embodiment which estimates an effective number ofbits of an ADC which does not internally contains a sample-and-holdcircuit. A sine wave from an analog signal generator 11 is retained in asample-and-hold circuit 13 during a clock duration provided by a clockgenerator 38 before it is applied to an ADC 14 under test. A waveformmemory RAM 39 accumulates a digital signal from the ADC 17. A conversionoperation by the ADC 14 is delayed by one clock by means of a delayelement 51 so that the operation takes place in a stabilized conditionof a sample held in the sample-and-hold circuit 13. In other respects,the arrangement is similar to that shown in FIG. 8A, and accordingly,the moving differentiator 37 may be replaced by Wavelet transform unit46.

Embodiment 3

As indicated in broken lines, a low pass filter 12 may be provided inthe arrangement of FIG. 8A to eliminate distortion components from thesine wave generated from the signal generator 11 before it is applied tothe ADC 14 which internally houses a sample-and-hold circuit. Also inFIG. 8B, a similar low pass filter 12 may be provided on the outside ofthe signal generator 11 in order to eliminate distortion components.

Embodiment 4

FIG. 9 shows parts disposed around the waveform memory in the system ofthe present invention. A sine wave from an analog signal generator 11 isapplied to an ADC 14 under test. A waveform memory 39 accumulates adigital signal from the ADC 14.

A. Signal Capture Through Trigger

The analog signal generator 11 also generates a trigger signal, whichstarts a remaining sample counter 42 which is preset to a number ofremaining samples L. Each time a new sample is received, the count inthe counter 42 is decremented by one. When the count in the counter 42becomes equal to zero, a switch 43 which is coupled to the waveformmemory 39 is turned off to terminate the write-in of the digital signalto the waveform memory 39.

B. Signal Capture Through Internal Timing

The CPU 38 shown in FIG. 5 or 6, or the control computer 48 shown inFIG. 7 operates to execute a command selected by a user or a commandfrom a file which is read out from the disc together with thesub-system. When a command “hold an input signal” is given, the CPU orthe control computer turns the switch 43 which is coupled to thewaveform memory 39 off, thus terminating the write of the digital signalinto the waveform memory 49.

In either instance, a read-out of the digital waveform from the waveformmemory 39 takes place as follows:

It is initially assumed that the waveform memory 39 has a size of 1024,meaning that memory addresses are from 0 to 1023. If a last writeaddress to the waveform memory 39 were 500 (or 1023), the last writeaddress may be read out from the address generator 44 and incremented byone by the remainder operation to provide an address of 501 (or 0). Theoldest sample is stored at this address. Thus, samples can besequentially read out beginning with the oldest sample by reading outthe last write address into the waveform memory 39 from the addressgenerator 44 and incrementing it by one by the remainder operation.

A device 53 for calculating “a number of offset samples between waveformmemories which store digital waveforms having a phase difference of 90°therebetween” which correspond to the cosine wave and the sine wave isgiven the frequency fo of the sine wave and the sampling frequency f_(S)of the ADC 14 to calculate “a number of offset samples k within thewaveform memory 39 which store the digital waveforms having a phasedifference of 90°”.

k=[f _(S)/(4f ₀)]  (11)

where [y] represents a maximum integer equal to or less than y. Aninstantaneous magnitude estimator 21 takes digital waveforms for (M+k)samples from the waveform memory 39 where M represents “a number ofsamples selected for estimation of the effective number of bits” and k“a number of offset samples” which is determined by the number of offsetsamples calculator 53. Subsequently, the instantaneous magnitudeestimator 21 forms pairs of {circumflex over (X)}[0] and {circumflexover (X)}[k], {circumflex over (X)}[1] and {circumflex over (X)}[k+1], .. . , {circumflex over (X)}[M] and {circumflex over (X)}[M+1],respectively, in the array of digital waveforms which has been takentherein by incrementing by one by the remainder operation, forms a sumof squares thereof and forms a square root of the sum of squares tocalculate the instantaneous amplitude z(n) in accordance with theequation (7).

The array of instantaneous amplitudes is supplied to an interleaver 20as an input, which then produces interleaved signals using the amplitudeA of the sine wave and the array of instantaneous amplitudes.

The interleaved signals produced by the interleave 20 are input to adigital moving differentiator 37, which then calculates the movingdifferences between the interleaved signals. A peak finder 23 receivesthe array of the difference signals as inputs, and detects and deliversa maximum amplitude. A logarithm of the detected maximum amplitude isformed and is substituted to the equation (10) to estimate theinstantaneous effective number of bits B.

Alternatively, the instantaneous amplitudes z(n) which are determined bythe instantaneous amplitude estimator 21 may be fed in the time sequenceto the digital sequence differentiator 37 where a moving difference withrespect to an immediately preceding instantaneous amplitude z(n−1) maybe calculated. The peak finder 23 receives the moving differences asinputs, compares the maximum value which has been stored therein up tothis point in time against the new moving difference, and chooses agreater one of them to be stored and delivered as a maximum amplitude. Alogarithm of the detected maximum amplitude may be formed to estimatethe instantaneous effective number of bits B according to the equation(10). Again, as indicated in parentheses, the moving differentiator 37may be replaced by Wavelet transform unit 46. In this instance, Mrepresents a number of Wavelet transformed samples.

Embodiment 5

FIG. 10 shows parts disposed around the waveform memory 39 in the systemof the present invention. It is assumed that a real part waveform memory39R has a remaining sample counter 42R associated therewith in which anumber of remaining samples L is preset. A device for calculating “anumber of offset samples in a digital waveform having a phase differenceof 90° therebetween” which correspond to the cosine wave and the sinewave is supplied with the frequency f₀ of the sine wave and the samplingfrequency f_(S) of the sampling frequency of the ADC to calculate “anumber of offset samples k in the digital waveform having a phasedifference of 90°” according to the equation (11). An imaginary partwaveform memory 39I has a remaining sample counter 42I associatedtherewith which is preset to L+k. It is assumed that a selection switch43 associated with the waveform memory 39 now selects the real partwaveform memory 39R. A signal generator 11 which generates an analogsignal generates a cosine wave, which is applied to an ADC 14 undertest. The real part waveform memory 39R accumulates a digital signalfrom the ADC 14. A trigger signal generated by the analog signalgenerator 11 starts the remaining sample counters 42R, 42I, and when thecount in the remaining sample counter 42R becomes equal to zero forexample, a switch 43R coupled to the real part waveform memory 39R isturned off, terminating the write-in of the digital signal into the realpart digital memory 39R, followed by a selection of the imaginary partwaveform memory 39I by a selection switch 43I associated therewith. Thesignal generator 11 which generates an analog signal generates a cosinewave, which is then applied to the ADC 14 under test. The imaginary partwaveform memory 39I accumulates a digital signal from the ADC 14. Asbefore, a trigger signal generated by the analog signal generator 11starts the remaining sample counter 42I, and when the count in theremaining sample counter 42I becomes equal to zero, for example, theswitch 43I coupled to the imaginary part waveform memory 39I is turnedoff, terminating the writing of the digital signal into the imaginarypart waveform memory 39I. Sine waves corresponding to the imaginary partare stored in the waveform memory 39I for the number of offset samplesk.

The instantaneous magnitude estimator 21 takes digital waveforms for Msamples from the real part waveform memory 39R and the imaginary partwaveform memory 39I where M represents “a number of samples selected toestimate the effective number of bits”. Then, taking pairs of{circumflex over (X)}.re[0] and {circumflex over (X)}.im[0], {circumflexover (X)}.re[1] and {circumflex over (X)}.im[1], . . . , {circumflexover (X)}.re[M] and {circumflex over (X)}.im[M] in the array of digitalwaveforms, each of which has been taken therein by incrementing by oneby the remainder operation, the instantaneous magnitude estimator 21determine a sum of squares thereof and then calculates a square root ofthe sum of squares to determine an array of instantaneous amplitudes.

z(n)={square root over ({circumflex over (X)})}.re[n] ² +{circumflexover (X)}.im[n] ²  (12)

The array of instantaneous amplitudes is supplied to the interleaver 20as inputs, which then produces interleaved signals using the amplitude Aof the sine wave and the array of instantaneous amplitudes.

The digital moving differentiator 37 and the maximum value finder 23operate in a similar manner as mentioned above. As indicated inparentheses in FIG. 10, the moving differentiator 38 may be replaced byWavelet transform unit 46. In this instance, M represents a number ofWavelet transformed samples.

FIG. 11 shows a specific example of the digital moving differentiator37, which is non-cyclic filter represented by the following equation:

y(n)=h(N)x(n−N)+h(N−1)x(n−N+1)+ . . . +h(1)x(n−1)+h(0)x(n)  (13-1)

where it may be assumed that h(0)=½, h(1)=−½ and other filtercoefficients are h(2)= . . . =h(N)=0, whereupon the filter represents adifference filter represented as follows:

y(n)=−(½)x(n−1)+(½)x(n)  (13-2)

Thus, x(n) is supplied to a multiplier 61 and a one sample period delayelement 62 and an output from the delay element 62 is supplied to amultiplier 63. The multipliers 61 and 63 multiply respective input by afactor of h(0)=½ and h(1)=−½, respectively, and their multiplicationresults are added together in an adder 64 to provide an output y(n). Inthis manner, an output signal represents a difference between thecurrent value x(n) and an immediately preceding value x(n−1) of theinput signal. A procedure to determine optimum filter coefficients isdescribed in “Discrete-Time Signal Processing”, by Alan V. Oppenheim,Ronald W. Schafer, Prentice-Hall, 1989, in particular, 7.5.2Discrete-Time Differentiators. The difference filter may be implementedin either a digital filter shown in FIG. 16 or a digital movingdifferentiator which is used to perform a calculation of the equation(13-2).

A method of observing a time distribution of local maxima in theinstantaneous effective number of bits will now be considered. When Msamples are input to a digital moving differentiator, (M−1) differencesare delivered as outputs. Accordingly, the period of the differenceoutput corresponds to the period of the input. By using the frequency f₀of the sine wave and the sampling frequency f_(S) of the ADC as inputs,“a number of samples p per period” is calculated.

p=[f _(S) /f ₀]  (14)

The “number of samples p per period” is used as a control input to apeak finder. When p difference samples each having an absolute value aresupplied, a processing operation takes place which comprises (a) forminga logarithm of the absolute value of only a maximal value and using itto deliver an instantaneous effective number of bits B according to theequation (10), and (b) delivering zeros for the remaining (p−1) data. Bythis processing operation, it is possible to observe an instantaneouseffective number of bits at a maximal value as a function of time.

FIG. 12 shows a flow of processing which takes place in the Wavelettransform unit 46 where Haar base function is used. In addition, anormalization factor of ½ is used here, but may be 1/{square root over(2)} as is commonly used. M input signals f(i), (i=1, 2, . . . , M) areused to calculate n=log₂ M, thus converting input signals f(i) to outputsignals a(i). k is changed to be n, n−1, . . . , 2, 1, and form=2^(k−1), a low pass filtering takes place by the calculation ofx(i)={a(2i−1)+a(2i)}/2 (i=1, 2, . . . , m) and a high pass filtering isapplied by the calculation of y(i)={−a(2i−1)+a(2i)}/2 (i=1, 2, . . . ,m). As a result of these calculations, a(i)=x(i), (i=1, 2, . . . , m)and a(i)=y(i), (i=m+1, . . . , 2m) are outputted.

FIGS. 13 and 14 show a flow of processing in the Wavelet transform unitwhen using Daubechies base function. In these flow charts, a scalecorresponding to a period or “k” in 2^(k−1) is treated as “level k”. Thealgorithm of the Wavelet transform is described in detail in “Waveletsand Subband Coding”, by Mathin Vetterli, Jelena Kovacevic,Prentice-Hall, 1995. The implementation of the Wavelet transform in VLSIis reported in “VLSI Implementation of Discrete Wavelet Transform”, byAleksander Grezeszczak, Mrinal K. Mandal, Sethuraman Panchanathan, TetYeap, IEEE Trans. Very Large Scale Integration (VLSI) System, Vol. 4,No. 4, 1996. Accordingly, the Wavelet transform unit may comprise theWavelet transform unit as shown in FIG. 12 or 13 or VLSI implementedWavelet transform unit.

FIG. 15A compares a number of real number multiplications between theDaubechies-Wavelet transform and the fast Fourier transform. A singleDaubechies-Wavelet transform includes a volume of computation which issubstantially equivalent to that of two Haar-Wavelet transforms. For 512samples, the number of real number multiplications is substantiallysimilar for both Daubechies-Wavelet transform and the fast Fouriertransform. At or above 1024 samples, the number of real numbermultiplications for the Daubechies-Wavelet transform becomes less thanthe number of real number multiplications for the fast Fouriertransform.

A method of observing a time distribution of a maximal value in theinstantaneous effective number of bits will now be described. When Msamples are inputted to the Wavelet transform unit, M/2 (M/2^(i+1))results of Wavelet transform are delivered for the maximum (general)scale level K_(MAX)(K_(MAX) ^(−i)). Accordingly, the period of theresult of the Wavelet transform corresponds to ½(1+2^(i+1)) times theperiod of the input. Using the frequency f₀ of the sine wave and thesampling frequency f_(S) of the ADC, “a number of samples p_(i) perperiod for the scale level (K_(MAX) ^(−i))” is calculated.

p _(i)=½^(i+1) [f _(S) /f ₀]  (15)

The “number of samples pi per period” is used as a control input to thepeak finder 23. If “p_(i)>1”, a processing for a maximal value takesplace. When the absolute magnitudes of pi results of Wavelet transformwhich correspond to the scale level (K_(MAX) ^(−i)) are supplied, (a) alogarithm of the absolute value of only a maximal value is formed toestimate and deliver an instantaneous effective number of bits Baccording to the equation (10), and (b) zeros are delivered for theremaining (p_(i)−1) data. If“p_(i)<1”, input data are delivered aszeros. When such a processing operation is applied, it is possible toobserve an instantaneous effective number of bits at a maximal value asa function of time. FIG. 16 shows a result of applying a maximal valueprocessing operation when 256 samples are taken from the sine wave overten periods.

With respect to the evaluation of DAC's, the use of Fourier transformwhich incorporates a mean square estimator or the curve fitting approachwhich utilizes a method of least squares cannot accomplish the sixth,the seventh and the eighth object initially mentioned. To accomplishthese objects, there is a need for means which can separatenon-idealities which are localized in respective input codes to a DAC.

As shown in FIG. 18, in the present invention, an output from DAC undertest (DUT) 112 is digitalized with a high precision ADC 113, and aninstantaneous magnitude estimator 121 is used which receives theresulting digital signal as an input. The high precision ADC 113 mayhave a conversion precision which is on the order of ten times higherthan the conversion precision of the DAC under test 112, andaccordingly, may contain three or four more bits than the DAC 112. Theinstantaneous magnitude estimator 121 may be constructed and function inthe same manner as the instantaneous magnitude estimator 21 used in theADC evaluation system.

In the prior art practice, a mean effective number of bits of a DACunder test is indirectly estimated by using a combination of a Fouriertransform unit and an SNR estimator. In accordance with the presentinvention, the combination of the Fourier transform unit and the SNRestimator is replaced by a combination of an instantaneous magnitudeestimator 121, an interleaver 120, a digital moving differentiator orWavelet transform unit 122 and a maximal value detector or peak finder123.

That is, as shown in FIG. 18, in the present invention, a sine wavepattern from a pattern generator 111 is applied to a DAC under test 112,an output analog waveform from the DAC. 12 is digitalized by a highprecision ADC 113 and stored in a waveform memory (not shown), and theinstantaneous amplitude of the stored waveform is calculated by theinstantaneous magnitude estimator 121. The instantaneous amplitude andthe known amplitude of the input sine wave are supplied to theinterleaver 120, which then produces interleaved signals. Theinterleaved signals are processed by the moving differentiator orWavelet transform unit 122, and the absolute magnitude of the outputtherefrom and the maximum value are determined by the peak finder 125 tobe used in determining the instantaneous effective number of bits.

As mentioned previously, the FFT approach or the curve fitting approachcannot directly determine non-idealities which are localized in therespective input codes of the DAC under test. For example, according tothe FFT approach, a digital signal comprising output signals from theDAC is subject to the Fourier transform, estimating a line spectrumwhich corresponds to an ideal sine wave in the frequency domain. Adifference spectrum is then determined which corresponds to the spectrumobtained by the Fourier transform, from which the line spectrum isexcluded. Finally, the difference spectrum is made to correspond tonon-idealities in the DAC under test. Similarly, according to the curvefitting approach, a calculation is repeated so that a square errorbetween the sampled digital waveform and an ideal sine wave isminimized, thus estimating the ideal sine wave. Non-idealities in theDAC under test are estimated by a difference vector formed between thevector of the sampled space waveform and the vector of the ideal sinewave.

By contrast, the instantaneous magnitude estimator 121 is used inaccordance with the present invention, and permit non-idealities whichare localized in respective input codes to the DAC under test to bedirectly determined. To simplify the description, it is assumed that theinput signal comprises a cosine wave. A digital waveform representingthe response from the DAC under test is a sum of the input cosine waveand non-idealities e[n] such as conversion errors of DAC under test.

{circumflex over (X)}[n]=A·cos(2πf ₀ n+Φ)+e[n]  (16)

It is to be noted that a digital signal representing the response of theDAC under test in response to the input cosine wave always contains asine wave which is related to the cosine wave by Hilbert transform.

{circumflex over (X)}[m]=H(X[n])+e[m]=A·sin(2πf ₀ n+Φ)+e(m)  (17)

When and are supplied to the instantaneous magnitude estimator, thelatter calculates and delivers the instantaneous amplitudes z(n).$\begin{matrix}\begin{matrix}{{z(n)} \equiv \quad \sqrt{{\hat{X}\lbrack n\rbrack}^{2} + {\hat{X}\lbrack m\rbrack}^{2}}} \\{\cong \quad {A + \left\{ {{{e\lbrack n\rbrack} \cdot {\cos \left( {{2\pi \quad f_{0}n} + \Phi} \right)}} + {{e\lbrack m\rbrack} \cdot {\sin \left( {{2\pi \quad f_{0}n} + \Phi} \right)}}} \right\}}}\end{matrix} & (18)\end{matrix}$

e[n] or e[m] is equal to zero for an ideal DAC having an infinite numberof bits, whereby an envelope of a given amplitude A is provided.Conversely, a DAC under test which has a finite number of bits providesan envelope of an error signal as indicated in FIG. 2A. Thus, it may beregarded as having the cosine wave and the sine wave in the input signalas carrier waves, the amplitude of which is modulated in accordance withe[n] or e[m] representing the non-idealities in the DAC under test.Accordingly, information representing a fault of the DAC under testappears in the amplitude modulation signal term in the equation (18).

In the dynamic performance test for the DAC under test, it is moreimportant to evaluate the worst value rather than determining a meanvalue of the effective number of bits. The estimation of the worstnumber for the effective number of bits may utilize a maximum or minimumvalue in the amplitude modulation signal given by the equation (18).

−Δ/2<e[n]<Δ/2  (19-1)

This inequality can define a range of the amplitude modulation signal asgiven below:

A−{square root over (2)}(Δ/2)<z[n]<A+{square root over (2)}(Δ/2)  (19-2)

When a maximal value and a minimal value in the amplitude modulationsignal given by the equation (18) is utilized in evaluating the worstnumber of the effective number of bits of the DAC under test, theinstantaneous value of the effective number of bits which corresponds tothe period of the input sine wave can be determined. For example, aglitch occurs as a result of a large transition in the digital codewhich is input to the DAC. On the other hand, noises occur without anycorrelation with the input signal. Thus, by seeing if the faultappearing in the amplitude modulation signal is periodic, or remainssubstantially constant, or comprises noise on which a periodic patternis superimposed, it is possible to determine if a single fault or acompounded fault prevails. In this manner, the instantaneous magnitudeestimator which is used in accordance with the present invention enablesdirect determination of non-idealities which are localized in therespective output codes of the DAC under test.

Assuming a number of samples which is equal to 512, the required volumeof computation will be as follows:

FFT approach: 4092 real number multiplications and 7668 real numberadditions;

curve fitting approach: 6656 real number multiplications and 4092 realnumber additions;

instantaneous magnitude estimator: 1024 real number multiplications and512 real number additions.

In this manner, the instantaneous magnitude estimator used in accordancewith the present invention provides a system and method which accomplishthe first, the second and the third object mentioned previously.

The function of and the effect brought forth by a digital movingdifferentiator will now be described. A single pulse signal 1−Δδ(t−τ)(FIG. 2B) having an amplitude of an output step size Δ is input to thedigital differentiator, and only 512 samples are sampled. The impulsesignal having an amplitude equal to the output step size corresponds toa minimum output signal from the DAC. As shown in FIG. 2C, it ispossible to observe −20 log₁₀(Δ/2) which is proportional to the outputstep size of the DAC.

Similarly, a single pulse signal 1−Δδ(t−τ) having an amplitude for theoutput step size Δ is input to the Wavelet transform unit, and only 512samples are sampled. As shown in FIG. 3, −20 log₁₀(Δ/2), −20 log₁₀(Δ/4),. . . , −20 log₁₀(Δ/256) which are proportional to the output step sizeof the DAC are observable in multiple resolutions corresponding to 8scales. A scale is the reciprocal of the frequency, which changes from2⁸ to 2¹ in this example. Conversely, it is seen that 2¹ to 2⁸ Waveletsexist along the time axis. The number of Wavelets which corresponds tothe frequency, or “m” of 2^(m) is referred to as a level. However, it isto be noted that Martin Vetterli et al refers to a scale whichcorresponds to the period, or “j” of 2^(j) is as a level.

FIG. 3B shows a result of Wavelet transform as observed at each scalelevel. It will be seen that Δ=V_(REF)/2^(B), B=DR/20 log₁₀ 2.Accordingly, it will be seen that the use of the digital movingdifferentiator or the Wavelet transform unit enables a determination ofwhether or not the output step size is working properly. If the singlepulse signal is subject to the Fourier transform, the spectrum will bespread across the entire frequency band of observation, preventing adetection of whether or not the output step signal of the ADC is workingproperly. It will be noted that in each logarithmic frequency zone shownin FIG. 3B (for example, (0,1), (1,2), . . . , (6,7), and (7,8)), thetotal time range (0 to 250) is observed in a compressed manner.

Assuming a number of samples which is equal to 512, the required volumeof computation will be as follows:

digital moving differentiator: 1022 real number multiplications and 511real number additions;

Daubechies-Wavelet transform unit: 4088 real number multiplications and3066 real number additions.

The function of and the effect brought forth by the interleaver will bedescribed. When the amplitude modulation signal z(n) given by theequation (18) and the amplitude A of the cosine wave applied aresupplied to the interleaver, it delivers the following signal f:

f≡(A, z(1), A, z(2), . . . ,A, z(n), . . . )

The signal f is a train of sub-signals (A, z(n)) or an impulse trainhaving a height of A−z(n). It will be seen from the theory of the singlepulse signal mentioned above that the height of the impulse train can beestimated by supplying the signal f to the digital moving differentiatoror the Wavelet transform unit.

A maximum value of the output from the digital moving differentiator orWavelet transform unit provides a dynamic range of DAC under test.$\begin{matrix}{{DR} \equiv {{- 20}{{\log_{10}\left\lbrack \frac{1}{2^{\hat{B} + 0.5}} \right\rbrack}\lbrack{dB}\rbrack}}} & (20)\end{matrix}$

Conversely, the instantaneous effective number of bits B of the DACunder test can be estimated from the value of DR observed.

B=(DR/20 log₁₀ 2)−0.5[bit]  (21)

When the amplitude modulation signal given by the equation (18) is inputto the digital moving differentiator or Wavelet transform unit (FIG.18), the instantaneous effective number of bits can be observed as afunction of time as indicated in FIG. 4A. In addition, the absolutemagnitude of the output from the digital moving differentiator orWavelet transform unit may be determined and input to the peak finder,thereby allowing the instantaneous effective number of bits to beestimated in accordance with the equation (21) from the maximum valuedelivered.

The number of bits in the DAC under test is changed from 2 to 22 forpurpose of verifying the process of estimating the instantaneouseffective number of bits. The result is indicated in FIG. 4B where “+”indicates an instantaneous effective number of bits which is estimatedin response to an input of a single pulse signal and “O” represents aninstantaneous effective number of bits which is estimated by supplyingthe sine wave to the DAC under test and using the combination of theinstantaneous magnitude estimator, the digital moving differentiator orHaar-Wavelet transform unit and the peak finder. In this Figure, “*”represents an instantaneous effective number of bits which is estimatedby supplying the sine wave to the DAC under test and using thecombination of the instantaneous magnitude estimator, the DaubechiesWavelet transform unit and the peak finder. It will be seen that in eachinstance, an instantaneous effective number of bits which corresponds tothe number of bits of the DAC under test is estimated.

In this manner, the combination of the instantaneous magnitude estimatorand either the digital moving differentiator or Wavelet transform unitwhich are used in accordance with the present invention provides asystem which accomplishes the fourth and the fifth object mentionedpreviously.

The instantaneous magnitude estimator according to the present inventionprovides (1) an instant effective number of bits estimator which iscapable of independently dealing with factors in a compounded fault, (2)an effective number of bits estimator which permits an arbitrary choiceof the testing frequency, and (3) an effective number of bits estimatorwhich can be implemented in a simple hardware.

In addition, a combination of the instantaneous magnitude estimator andeither the digital moving differentiator or Wavelet transform unitaccording to the present invention provides (4) an effective number ofbits estimator which allows a high accuracy of determination to beobtained without increasing the length of time, and (5) a system whichpermits the observation of the instantaneous effective number of bits asa function of time.

Preferred embodiments of the present invention will be described in moredetail with reference to the drawings.

FIG. 19 shows the arrangement of an effective number of bits estimatorin accordance with the present invention. The arrangement comprises aCPU 131 which performs data entry or delivery and calculations, afloating decimal point calculator chip 132, a keyboard or a front panel133 which is used to enter parameters or instructions, a display 134which displays a menu selected by a user or results of determination, anROM 135, RAM 136 or disk unit which store inputs from the user or otherdata. In addition, the arrangement includes an interleaver 120 and adigital moving differentiator 137. A pattern generator 111 whichgenerates a pattern signal generates a sine wave, which is applied to aDAC 112 under test. A timing controller 138 generates a clock, which issupplied to a high precision A/D converter 113, thus controlling thetiming when the A/D conversion of analog signal delivered from the DAC112 takes place. A waveform memory (RAM Signal) 139 reads a digitalsignal-which is accumulated in a buffer 141 connected to the output ofthe ADC 113 in synchronism with an end of conversion signal deliveredfrom the ADC 113, for example. The waveform memory 139 may be assumed tohave a size of 1024, for example, thus having memory addresses of0-1023. The pattern generator 111 also generates a trigger signal, whichstarts a remaining sample counter 142, and when the count in the counter142 becomes equal to zero, for example, a switch 143 which couples thebuffer 141 to the waveform memory 139 is turned off, thus terminatingthe write-in of the digital signal into the waveform memory 139. If thelast write-in address to the waveform memory 139 were 500 (or 1023) atthis time, the last write-in address is read out from an addressgenerator 144 and is incremented by one to preset the remaindercalculation, thus providing an address of 501 (or 0) where an oldestsample is stored. Thus, when the last write-in address to the waveformmemory 139 is read out from the address generator 144 and is incrementedby one, each sample can be read out in sequential order beginning withthe oldest sample.

The frequency f₀ and the amplitude A of the sine wave, the samplingfrequency f_(S) and the number of remaining samples L which is preset asa trigger condition can be selected by a user through the keyboard 133or front panel. These parameters may also be written into a file savedin a disc and read from this file upon commencement of the test. CPU 131write these parameters into control registers associated with the signalgenerator 111, a low pass filter 112 or the waveform memory 139.

FIG. 20 shows the arrangement of another form of an effective number ofbits estimator according to the present invention, and partscorresponding to those shown in FIG. 19 are designated by like referencecharacters as used in FIG. 19. The difference over the arrangement ofFIG. 9 lies in that the digital moving differentiator 37 shown in FIG.19 is replaced by Wavelet transform unit 146 in FIG. 20.

FIG. 21 shows the arrangement of a further form of an effective numberof bits estimator according to the present invention. A distinction overthe arrangements shown in FIGS. 19 and 20 lies in the provision of acontrol computer 148 which exercises a control over the effective numberof bits estimator. The control computer 141 may comprise SPARC computeravailable from Sun Microsystems, and serves the functions of the CPU131, the floating decimal point calculator chip 132, the keyboard 133,the display 134, the ROM 135, the RAM 136, the interleaver 120 anddigital moving differentiator 137 or the Wavelet transform unit 146shown in FIGS. 19 and 20.

Embodiment 1

FIG. 22A shows a schematic view of an effective number of bits estimatoraccording to the present invention. A pattern generator 111 whichgenerates a digital signal generates a sine wave pattern, which isapplied to a DAC under test 112. A timing controller 138 generates aclock which is supplied to a high precision ADC 113 for controlling thetiming of operation of the ADC 113 which performs an A/D conversion forthe output from the DAC 112. A waveform memory or RAM 139 accumulates adigital signal from the ADC 113 in synchronism with an end of conversionsignal delivered from the ADC 113, for example. An instantaneousmagnitude estimator 121 forms a suitable pair of data {circumflex over(X)}[n] and {circumflex over (X)}[m] from the array of digital waveformsupplied from the waveform memory, determines a sum of squares and formsa square root of the sum of the squares to calculate an instantaneousamplitude z(n) in accordance with the equation (18).

The array of instantaneous amplitudes is supplied as an input to aninterleaver 120, which then produces an interleaved signal from theamplitude A of the sine wave and the array of instantaneous amplitudes.The interleaved signals are supplied as an input to a digital movingdifferentiator 137, which then calculates a moving difference betweenadjacent interleaved signals, thus sequentially delivering a differencebetween a current input value and an immediately preceding input value.Since the input interleaved signals are formed in the order of ( . . . ,A, z(n), A, . . . ), a difference having the same absolute value|A−z(n)| may be delivered twice in succession. To prevent this, thedigital moving differentiator 37 is designed to deliver one sample everytwo samples, thus assuring that the difference represented by theabsolute value |A−z(n)| is delivered only once. To summarize, theinstantaneous amplitudes comprising M samples are input to theinterleaver 120, the output of which is processed by the digital movingdifferentiator 137, providing an output having M samples. A peak finder123 receives the array of difference signals as its input, detects anddelivers a maximum amplitude. A logarithm of the detected maximumamplitude may be formed and substituted into the equation (21) asrepresenting dB value, thereby allowing the instantaneous effectivenumber of bits B to be estimated.

As indicated in parentheses, the moving differentiator 137 may bereplaced by a Wavelet transform unit 146.

Embodiment 2

FIG. 22B shows an embodiment in which a deglitch circuit(sample-and-hold circuit) 149 is added to the arrangement of FIG. 22A. Asine wave pattern from a pattern generator 111 is applied to a DAC 112under test in synchronism with a clock supplied from a clock generator138. An analog signal which is output from the DAC 12 has any glitchesremoved by the deglitch circuit 149 before it is supplied to an ADC 113.A waveform memory 139 accumulates a digital signal from the ADC 113. Aconversion operation of the ADC 113 is delayed by one clock by means ofa delay element 151 so that the conversion takes place in a stabilizedcondition of the sample-and-hold circuit within the deglitch circuit149. In other respects, the arrangement is similar to that shown in FIG.22A. Accordingly, the moving differentiator 137 may be replaced byWavelet transform unit 146.

Embodiment 3

FIG. 23 shows parts disposed around the waveform memory in the system ofthe present invention in detail. A sine wave pattern from a patterngenerator 111 is applied to a DAC under test 112, and a waveform memory139 accumulates a digital signal from the ADC 113.

A: Signal Capture Through Trigger

The pattern generator 111 also generates a trigger signal, which startsa remaining sample counter 142 in which a number of remaining samples Lis preset. The count in the counter 142 is decremented by one each timea sample is received. When the count in the counter 142 becomes equal tozero, a switch 143 coupled to the waveform memory 139 is turned off,thus terminating the write-in of the digital signal into the waveformmemory 39.

B: Signal Capture Through Internal Timing

CPU 131 shown in FIG. 19 or 20 or the control computer 148 shown in FIG.21 executes a command selected by a user or a command from a file whichis read from the disc together with an associated subsystem. When acommand “hold an input signal” is given, the CPU or the control computerturns the switch 143 which is coupled to the waveform memory 139 off,thus terminating the write-in of the digital signal into the waveformmemory 139.

In either instance, a read-out of the digital waveform from the waveformmemory 139 takes place as follows:

It is initially assumed that the waveform memory 139 has a size of 1024,thus having the memory addresses of 0 to 1023. If the last write-inaddress to the waveform memory 139 were 500 (of 1023), the last write-inaddress may be read out from the address generator 144 and incrementedby one for a remainder operation to provide an address of 501 where anoldest sample is stored. Thus, when the last write-in address to thewaveform 139 is read out from the address generator and incremented byone, the respective samples can be read out in a sequential orderbeginning with the oldest sample.

A device 153 for calculating “a number of offset samples betweenwaveform memories which store digital waveforms having a phasedifference of 90° therebetween” which corresponds to the cosine wave andthe sine wave may be supplied with the frequency f₀ of the sine wave andthe sampling frequency f_(S) of the ADC 113 to calculate “a number ofoffset samples k between the waveform memories 139 which store thedigital waveforms having a phase difference of 90° therebetween”

 k=[f _(S)/(4 f ₀)]  (22)

where [y] represents a maximum integer equal to or less than y.

An instantaneous magnitude estimator 121 receives a digital waveform for(M+k) samples from the waveform memory 139 where M represents “a numberof samples selected to estimate the effective number of bits” and krepresents “a number of offset samples” which is determined by thenumber of offset samples calculator device 153. The instantaneousmagnitude estimator 121 then forms pairs of {circumflex over (X)}[0] and{circumflex over (X)}[k], {circumflex over (X)}[1] and {circumflex over(X)}[k+1], . . . , {circumflex over (X)}[M] and {circumflex over(X)}[M+1], which are taken from the array of digital waveforms byincrementing by one to preset the remainder, determines a sum ofsquares, and forms a square root of the sums of squares to calculate aninstantaneous amplitude z(n) according to the equation (18).

The array of instantaneous amplitudes thus formed is input to aninterleaver 120 where interleaved signals are produced using theamplitude A of the sine wave and the array of instantaneous amplitudes.

Interleaved signals produced by the interleave 120 are input to adigital moving differentiator 137, which then operates to calculate amoving difference between the interleaved signals. The array ofdifference signals is then input to a peak finder 123 where a peakamplitude is detected and delivered. A logarithm of the detected maximumamplitude is formed and is substituted into the equation (21) toestimate an instantaneous effective number of bits B.

Alternatively, the instantaneous amplitudes z(n) which are determined bythe instantaneous magnitude estimator 121 may be input to the digitalmoving differentiator 137 in the sequence of time in order to calculatea moving difference between it and its immediately precedinginstantaneous amplitude z(n−1). The peak finder 123 receives the movingdifferences, compares the moving difference against the prevailingmaximum value that is stored therein, and chooses a greater one to storeand delivers it as a maximum amplitude. By forming a logarithm of thedetected maximum amplitude, an instantaneous effective number of bits Bcan be estimated according to the equation (21). As indicated inparentheses, the moving differentiator 137 may be replaced by a Wavelettransform unit 46. In this instance, M mentioned above represents anumber of Wavelet transformed samples.

Embodiment 4

FIG. 24 shows parts disposed around a waveform memory 139 in the systemof the present invention in detail. A real part waveform memory 139R hasa remaining sample counter 142R associated therewith in which a numberof remaining samples L is preset. A device for calculating “a number ofoffset samples between digital waveforms having a phase difference of90° therebetween” which correspond to the cosine wave and the sine wavemay be supplied with the frequency f₀ of the sine wave and the samplingfrequency f_(S) of an ADC 113 to calculate “a number k of offset samplesin the digital waveform having a phase difference of 90° therebetween”according to the equation (22). An imaginary part waveform memory 139Ihas a remaining sample counter 142I associated therewith which is presetto L+k. The waveform memory 139 is associated with a selection switch143, which is assumed to be now selecting the real part waveform memory139R. A pattern generator 111 which generates a digital signal generatesa cosine wave, which is applied to a DAC under test 112. The real partwaveform memory 139R accumulates a digital signal from the ADC 113. Thepattern generator 111 also generates a trigger signal, which startsremaining sample counters 142R and 142I, and when the count in thecounter 142R becomes equal to zero, for example, a switch 143R coupledto the real part waveform memory 139R is turned off, thus terminatingthe write-in of the digital signal into the real part waveform memory139R. A selection switch 1431 associated with the waveform memory 139then selects the imaginary part waveform memory 139I. The patterngenerator 111 generates a cosine wave, which is then applied to the DACunder test 112. The imaginary part waveform memory 149I accumulates adigital signal from the ADC 113. Similarly, a trigger signal generatedby the pattern generator 111 starts the remaining sample counter 142I,and when the count in the remaining sample counter 142I becomes equal tozero, for example, a switch 143I coupled to the imaginary part waveformmemory 149I is turned off, thus terminating the write-in of the digitalsignal into the imaginary part waveform memory 139I. The sine waves forthe imaginary part is stored in the waveform memory 139I for the numberof offset samples k.

An instantaneous magnitude estimator 121 takes digital waveforms for Msamples each from the real part waveform memory 139R and the imaginarypart waveform memory 139I where M represents “the number of samplesselected to estimate the effective number of bits”. Instantaneousmagnitude estimator 121 then forms pairs of {circumflex over (X)}.re[0]and {circumflex over (X)}.im[0], {circumflex over (X)}.re[1] and{circumflex over (X)}.im[1], . . . , {circumflex over (X)}.re[M] and{circumflex over (X)}.im[M] from the array of digital waveforms which ithas received by incrementing by one for the remainder operation, anddetermines a sum of squares. It then forms a square root of the sum ofsquares to determine an instantaneous amplitudes array.

z(n)={square root over ({circumflex over (X)})}.re[n] ² +{circumflexover (X)}.im[n] ²  (23)

The array of instantaneous amplitudes is input to an interleaver 120,which then produces interleaved signals using the amplitude A of thesine wave and the array of instantaneous amplitudes.

The operation of a digital moving differentiator 137 and a peak finder123 remains similar to that mentioned above. However, in FIG. 24, themoving differentiator 137 may be replaced by a Wavelet transform unit146, as indicated in parentheses. In this instance, M mentioned aboverepresents a number of Wavelet transformed samples.

A specific example of the digital moving differentiator 137 is shown inFIG. 11, and is non-cyclic filter represented by the following equation:$\begin{matrix}\begin{matrix}{{y(n)} = \quad {{{h(N)} \times \left( {n - N} \right)} + {{h\left( {N - 1} \right)} \times \left( {n - N + 1} \right)} + \ldots +}} \\{\quad {{{h(1)} \times \left( {n - 1} \right)} + {{h(0)} \times (n)}}}\end{matrix} & \text{(24-1)}\end{matrix}$

where it may be assumed that h(0)=½, h(1)=−½ and other filtercoefficients are h(2)= . . . =h(N)=0, resulting in a differential filtergiven by the following equation:

y(n)=−(½)x(n−1)+(½)x(n)  (24-2)

Thus, x(n) is supplied to a multiplier 61 and a one sample period delayelement 62, the output of which is supplied to a multiplier 63. In themultipliers 61 and 63, the respective input is multiplied by a factor ofh(0)=½, and h(1)=−½, respectively, and individual results ofmultiplications are added together in an adder 64 to provide an outputy(n). In this manner, the difference between the current value x(n) andan immediately preceding value x(n−1) of the input signal represents theoutput signal. A procedure for determining optimum filter coefficientsis described in “Discrete-Time Signal Processing”, by Alan V. Oppenheim,Ronald W. Schafer, Prentice-Hall, 1989, in particular, 7.5.2Discrete-Time Differentiators. The differential filter may beimplemented as a digital filter shown in FIG. 16 or a digital movingdifferentiator which is used to perform a calculation according to theequation (13-2).

A method of observing a time distribution of local maxima in theinstantaneous effective number of bits will be described. When M samplesare input to a digital moving differentiator, (M−1) differences aredelivered as outputs. Accordingly, the period of the difference outputcorresponds to the period of the input. Using the frequency f₀ of thesine wave and the sampling frequency f_(S) of the-ADC 113, “a number ofsamples p per period” is calculated.

p=[f _(S) /f ₀]  (25)

The “number of samples p per period” is used as a control input to thepeak finder. When p differences represented in absolute magnitudes areinput thereto, there takes place a processing operation in the peakfinder which comprises (a) forming a logarithm of the absolute magnitudeof only a maximal value to estimate and deliver an instantaneouseffective number of bits B according to the equation (21), and (b)delivering zeros for the remaining (p−1) data. By such a processingoperation, an instantaneous effective number of bits at a maximal valuecan be observed as a function of time.

FIG. 12 shows a flow of processing which occurs in the Wavelet transformunit 146. Here, Haar base function is used. In this Figure, anormalization coefficient of ½ is used, but a normalization coefficientmay be chosen as as 1/{square root over (2)} is commonly used.Initially, n=log₂M is calculated from M input signals f(i), (i=1, 2, . .. , M), thus copying to an interim result a(i) which corresponds to anoutput signal. Changing k in the manner of k=n, n−1, . . . , 2, 1, form=2^(k−1), a calculation of x(i)={a(2i−1)+a(2i)}/2 (i=1, 2, . . . , m)is made as a low pass filtering operation, and a calculation ofy(i)={−a(2i−1)+a(2i)}/2 (i=1, 2, . . . , m) is made as a high passfiltering operation. The result of these calculations are copied to theinterim result a(i). Thus a(i)=x(i), (i=1, 2, . . . , m) and a(i)=y(i),(i=m+1, . . . , 2m) are delivered.

FIGS. 13 and 14 show a flow of processing which takes place in theWavelet transform unit which uses Daubechies base function. In theseflow charts, a scale corresponding to the period or “k” in 2^(k−1) istreated as “level k”. The algorithm of the Wavelet transform isdescribed in detail in “Wavelets and Subband Coding”, by MathinVetterli, Jelena Kovacevic, Prentice-Hall, 1995. The implementation ofthe Wavelet transform in VLSI is reported in “VLSI Implementation ofDiscrete Wavelet Transform”, by Aleksander Grezeszczak, Mrinal K.Mandal, Sethuraman Panchanathan, Tet Yeap, IEEE Trans. Very Large ScaleIntegration (VLSI) System, Vol. 4, No. 4, 1996.) Accordingly, theWavelet transform unit may comprise the Wavelet transform unit as shownin FIG. 12 or 13 or VLSI implemented Wavelet transform unit.

FIG. 15A shows a comparison of the number of real number multiplicationsbetween the Daubechies Wavelet transform and the fast Fourier transform.The single Daubechies Wavelet transform requires a volume of computationwhich is substantially equivalent to the volume of computations forperforming the Haar Wavelet transform twice. For a number of sampleswhich is equal to 512, the number of real number multiplications will besubstantially similar for both Daubechies Wavelet transform and the fastFourier transform. Above 1024 samples, the number of real numbermultiplications for the Daubechies Wavelet transform will be less thanthe number of real number multiplications of the fast Fourier transform.

A method of observing a time distribution of local maxima in theinstantaneous effective number of bits will now be described. When Msamples are input to the Wavelet transform unit, M/2(M/2^(i+1)) resultsof Wavelet transform will be delivered for a maximum (or general) scalelevel K_(MAX) (K_(MAX)−i). Accordingly, the period of the result of theWavelet transform corresponds to ½(½^(i+1)) times the period of theinput. Using the frequency f₀ of the sine wave and the samplingfrequency f_(S) of the DAC, “the number of samples pi per period for thescale level (K_(MAX)−i)” is calculated.

pi=½^(i+1) [f _(S) /f ₀]  (26)

The “number of samples pi per period” is used as a control input to thepeak finder 123. For “pi≧1”, a maximal value processing operation takesplace. Thus, when the absolute magnitudes of pi results of Wavelettransform which correspond to the scale level (K_(MAX)−i) are input, (a)a logarithm of the respective absolute magnitude of only a maximal valueis formed to estimate and deliver an instantaneous effective number ofbits B according to the equation (21), and (b) zeros are delivered forthe remaining (pi−1) data. If“pi<1”, zeros are delivered instead ofinput data. By using such operations, the instantaneous effective numberof bits at a maximal value can be observed as a functions of time. FIG.16 shows a result of a maximal value processing operation when 256samples are taken from the sine wave which extends over ten periods.

What is claimed is:
 1. An evaluation system for a D-A convertercomprising: a pattern generator for generating a sine wave pattern inthe form of a digital signal; a timing controller for generating a clockwhich is used in supplying the sine wave pattern to a D-A converterunder test; an A-D converter having a higher accuracy of conversion thanthe D-A converter and operative to convert an analog signal outputtedfrom the D-A converter to a digital signal; a waveform memory forstoring and accumulating a digital signal outputted from the A-Dconverter; instantaneous amplitude calculation means for taking out adigital signal stored in the waveform memory therefrom and determiningan instantaneous amplitude; interleave signal producing means forreceiving the instantaneous amplitude and the amplitude of the sine-waveas its inputs and forming an interleave signal in which theinstantaneous amplitude and the amplitude of the sine wave areinterleaved; and digital moving differentiator means for receiving theinterleave signal as its input and calculating a moving difference. 2.The evaluation system for a D-A converter according to claim 1, furthercomprising a digital signal selecting means for selecting and taking outfrom the waveform memory either a digital signal the applied signalpattern of which corresponds to a cosine wave or a digital signal theapplied signal pattern of which corresponds to a sine wave.
 3. Theevaluation system for a D-A converter according to claim 2, wherein theinstantaneous amplitude calculation means comprises: multiplicationmeans for reading a plurality of digital signals from the waveformmemory to derive a square signal of a digital signals corresponding tothe cosine wave and a square signal of a digital signal corresponding tothe sine wave; adder means for adding a plurality of square signals toderive a square amplitude signal; and square root means for forming asquare root of the square amplitude signal to determine an instantaneousamplitude signal.
 4. The evaluation system for a D-A converter accordingto claim 2, wherein the digital moving differentiator means furthercomprises a combination of absolute value calculating means fordetermining an absolute value of a difference signal and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting the maximum value thereof.
 5. The evaluation system for a D-Aconverter according to claim 2, wherein the digital movingdifferentiator means further comprises: a period memory which stores theperiod of a sine wave being applied to the D-A converter; and acombination of absolute value calculating means for determining anabsolute value of a difference signal, and maximum value detecting meansfor receiving an absolute value signal as its input and detecting amaximal value thereof in correspondence to the period of the sine wave.6. The evaluation system for a D-A converter according to claim 1,wherein the waveform memory includes: a plurality of waveform memoriesfor storing and accumulating the digital signal; selecting means forselecting a waveform memory which stores and accumulates therein adigital signal pattern corresponding to a cosine wave or a digitalsignal pattern corresponding to a sine wave; and read-out means forselecting a waveform memory to read out the digital signal stored andaccumulated therein.
 7. The evaluation system for a D-A converteraccording to claim 6, further comprising: a trigger circuit coupled to awrite circuit for the waveform memory and generating a trigger signalunder a specified condition of an input digital signal pattern; andcontrol means for taking in a given quantity of digital signals on thebasis of the trigger signal from the trigger circuit.
 8. The evaluationsystem for a D-A converter according to claim 1, wherein theinstantaneous amplitude calculation means comprises: multiplicationmeans for reading a plurality of digital signals from the waveformmemory to derive a square signal of a digital signals corresponding tothe cosine wave and a square signal of a digital signal corresponding tothe sine wave; adder means for adding a plurality of square signals toderive a square amplitude signal; and square root means for forming asquare root of the square amplitude signal to determine an instantaneousamplitude signal.
 9. The evaluation system for a D-A converter accordingto claim 1, wherein the digital moving differentiator means furthercomprises a combination of absolute value calculating means fordetermining an absolute value of a difference signal and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting the maximum value thereof.
 10. The evaluation system for a D-Aconverter according to claim 1, wherein the digital movingdifferentiator means further comprises: a period memory which stores theperiod of a sine wave being applied to the D-A converter; and acombination of absolute value calculating means for determining anabsolute value of a difference signal, and maximum value detecting meansfor receiving an absolute value signal as its input and detecting amaximal value thereof in correspondence to the period of the sine wave.11. An evaluation system for a D-A converter comprising: a patterngenerator for generating a sine wave pattern in the form of a digitalsignal; a timing controller for generating a clock which is used insupplying the sine wave pattern to a D-A converter under test; an A-Dconverter having a higher accuracy of conversion than the D-A converterand operative to convert an analog signal outputted from the D-Aconverter to a digital signal; a waveform memory for storing andaccumulating a digital signal outputted from the A-D converter;instantaneous amplitude calculation means for taking out a digitalsignal stored in the waveform memory therefrom and determining aninstantaneous amplitude; interleave signal producing means for receivingthe instantaneous amplitude and the amplitude of the sine wave as itsinputs and forming an interleave signal in which the instantaneousamplitude and the amplitude of the sine wave are interleaved; andWavelet transform means for receiving the interleave signal as its inputand applying a Wavelet transform to the interleave signal.
 12. Theevaluation system for a D-A converter according to claim 11, furthercomprising a digital signal selecting means for selecting and taking outfrom the waveform memory either a digital signal the applied signalpattern of which corresponds to a cosine wave or a digital signal theapplied signal pattern of which corresponds to a sine wave.
 13. Theevaluation system for a D-A converter according to claim 12, wherein theinstantaneous amplitude calculation means comprises: multiplicationmeans for reading a plurality of digital signals from the waveformmemory to derive a square signal of a digital signals corresponding tothe cosine wave and a square signal of a digital signal corresponding tothe sine wave; adder means for adding a plurality of square signals toderive a square amplitude signal; and square root means for forming asquare root of the square amplitude signal to determine an instantaneousamplitude signal.
 14. The evaluation system for a D-A converteraccording to claim 12, wherein the Wavelet transform means furthercomprises a combination of absolute value calculating means fordetermining an absolute value of a signal obtained as a result of theWavelet transform, and maximum value detecting means for receiving anabsolute value signal as its input and detecting the maximum valuethereof.
 15. The evaluation system for a D-A converter according toclaim 12, wherein the Wavelet transform means further comprises: aperiod memory which stores the period of a sine wave being applied tothe D-A converter; and a combination of absolute value calculating meansfor determining an absolute value of a signal obtained as a result ofthe Wavelet transform, and maximal value detecting means for receivingan absolute value signal as its input and detecting a maximal valuethereof in correspondence to the period of the sine wave.
 16. Theevaluation system for a D-A converter according to claim 11, wherein thewaveform memory includes: a plurality of waveform memories for storingand accumulating the digital signal; selecting means for selecting awaveform memory which stores and accumulates therein a digital signalpattern corresponding to a cosine wave or a digital signal patterncorresponding to a sine wave; and read-out means for selecting awaveform memory to read out the digital signal stored and accumulatedtherein.
 17. The evaluation system for a D-A converter according toclaim 16, further comprising: a trigger circuit coupled to a writecircuit for the waveform memory and generating a trigger signal under aspecified condition of an input digital signal pattern; and controlmeans for taking in a given quantity of digital signals on the basis ofthe trigger signal from the trigger circuit.
 18. The evaluation systemfor a D-A converter according to claim 11, wherein the instantaneousamplitude calculation means comprises: multiplication means for readinga plurality of digital signals from the waveform memory to derive asquare signal of a digital signals corresponding to the cosine wave anda square signal of a digital signal corresponding to the sine wave;adder means for adding a plurality of square signals to derive a squareamplitude signal; and square root means for forming a square root of thesquare amplitude signal to determine an instantaneous amplitude signal.19. The evaluation system for a D-A converter according to claim 11,wherein the Wavelet transform means further comprises a combination ofabsolute value calculating means for determining an absolute value of asignal obtained as a result of the Wavelet transform, and maximum valuedetecting means for receiving an absolute value signal as its input anddetecting the maximum value thereof.
 20. The evaluation system for a D-Aconverter according to claim 11, wherein the Wavelet transform meansfurther comprises: a period memory which stores the period of a sinewave being applied to the D-A converter; and a combination of absolutevalue calculating means for determining an absolute value of a signalobtained as a result of the Wavelet transform, and maximal valuedetecting means for receiving an absolute value signal as its input anddetecting a maximal value thereof in correspondence to the period of thesine wave.
 21. A method for evaluating a D-A converter comprising:generating a sine wave pattern having an amplitude in the form of adigital signal; generating a clock which is used in supplying the sinewave pattern to a D-A converter under test; applying an A-D converterhaving a higher accuracy of conversion than the D-A converter to convertan analog signal outputted from the D-A converter to a digital signal;storing in a waveform memory a digital signal outputted from the A-Dconverter; determining an instantaneous amplitude signal from a digitalsignal stored in the waveform memory; forming an interleave signal inwhich the instantaneous amplitude and the amplitude of the sine wave areinterleaved; and calculating a moving difference.
 22. The method forevaluating a D-A converter according to claim 21, that further comprisesobtaining from the waveform memory either a digital signal thatcorresponds to a cosine wave or a digital signal that corresponds to asine wave.
 23. The method for evaluating a D-A converter according toclaim 22, wherein the act of determining an instantaneous amplitudecomprises: reading a plurality of digital signals from the waveformmemory to derive a square signal of a digital signal corresponding tothe cosine wave and a square signal of a digital signal corresponding tothe sine wave; adding a plurality of square signals to derive a squareamplitude signal; and forming a square root of the square amplitudesignal to determine an instantaneous amplitude signal.
 24. The methodfor evaluating a D-A converter according to claim 22, wherein the act-ofcalculating a moving difference comprises: determining an absolute valueof a difference signal, receiving an absolute value signal and detectinga maximum value thereof.
 25. The method for evaluating a D-A converteraccording to claim 22, wherein the act of calculating a movingdifference comprises: storing in a period memory a period of a sine wavebeing applied to the D-A converter, determining an absolute value of adifference signal, receiving an absolute value signal and detecting amaximum value thereof.
 26. The method for evaluating a D-A converteraccording to claim 21, that further comprises: storing the digitalsignal outputted from the A-D converter in a plurality of waveformmemories; selecting a waveform memory which stores therein a digitalsignal corresponding to a cosine wave or a digital signal correspondingto a sine wave; and reading out the digital signal stored in thewaveform memory selected by the selecting means.
 27. The method forevaluating a D-A converter according to claim 26, that furthercomprises: generating a trigger signal in response to an input digitalsignal; and receiving a given quantity of digital signals on the basisof the trigger signal.
 28. The method for evaluating a D-A converteraccording to claim 21, wherein the act of determining an instantaneousamplitude comprises: reading a plurality of digital signals from thewaveform memory to derive a square signal of a digital signalcorresponding to the cosine wave and a square signal of a digital signalcorresponding to the sine wave; adding a plurality of square signals toderive a square amplitude signal; and forming a square root of thesquare amplitude signal to determine an instantaneous amplitude signal.29. The method for evaluating a D-A converter according to claim 21,wherein the act of calculating a moving difference comprises:determining an absolute value of a difference signal, receiving anabsolute value signal and detecting a maximum value thereof.
 30. Themethod for evaluating a D-A converter according to claim 21, wherein theact of calculating a moving difference comprises: storing in a periodmemory a period of a sine wave being applied to the D-A converter,determining an absolute value of a difference signal, receiving anabsolute value signal and detecting a maximum value thereof.
 31. Amethod for evaluating a D-A converter comprising: generating a sine wavepattern having an amplitude in the form of a digital signal; generatinga clock which is used in supplying the sine wave pattern to a D-Aconverter under test; applying an A-D converter having a higher accuracyof conversion than the D-A converter to convert an analog signaloutputted from the D-A converter to a digital signal; storing a digitalsignal outputted from the A-D converter; determining an instantaneousamplitude signal from a digital signal stored in the waveform memory;forming an interleave signal in which the instantaneous amplitude andthe amplitude of the sine wave are interleaved; and applying a Wavelettransform to the interleave signal.
 32. The method for evaluating a D-Aconverter according to claim 31, that further comprises obtaining fromthe waveform memory either a digital signal that corresponds to a cosinewave or a digital signal that corresponds to a sine wave.
 33. The methodfor evaluating a D-A converter according to claim 32, wherein the act ofdetermining an instantaneous amplitude comprises: reading a plurality ofdigital signals from the waveform memory to derive a square signal of adigital signal corresponding to the cosine wave and a square signal of adigital signal corresponding to the sine wave; adding a plurality ofsquare signals to derive a square amplitude signal; and forming a squareroot of the square amplitude signal to determine an instantaneousamplitude signal.
 34. The method for evaluating a D-A converteraccording to claim 32, wherein the act of applying a Wavelet transformcomprises: determining an absolute value of a signal obtained as aresult of the Wavelet transform, receiving an absolute value signal anddetecting a maximum value thereof.
 35. The method for evaluating a D-Aconverter according to claim 32, wherein the act of applying a Wavelettransform comprises: storing in a period memory a period of a sine wavebeing applied to the D-A converter, determining an absolute value of asignal obtained as a result of the Wavelet transform, receiving anabsolute value signal and detecting a maximum value thereof.
 36. Themethod for evaluating a D-A converter according to claim 31, thatfurther comprises: storing the digital signal outputted from the A-Dconverter in a plurality of waveform memories; selecting a waveformmemory which stores therein a digital signal corresponding to a cosinewave or a digital signal corresponding to a sine wave; and reading outthe digital signal stored in the waveform memory selected by theselecting means.
 37. The method for evaluating a D-A converter accordingto claim 36, that further comprises: generating a trigger signal inresponse to an input digital signal; and receiving a given quantity ofdigital signals on the basis of the trigger signal.
 38. The method forevaluating a D-A converter according to claim 31, wherein the act ofdetermining an instantaneous amplitude comprises: reading a plurality ofdigital signals from the waveform memory to derive a square signal of adigital signal corresponding to the cosine wave and a square signal of adigital signal corresponding to the sine wave; adding a plurality ofsquare signals to derive a square amplitude signal; and forming a squareroot of the square amplitude signal to determine an instantaneousamplitude signal.
 39. The method for evaluating a D-A converteraccording to claim 31, wherein the act of applying a Wavelet transformcomprises: determining an absolute value of a signal obtained as aresult of the Wavelet transform, receiving an absolute value signal anddetecting a maximum value thereof.
 40. The method for evaluating a D-Aconverter according to claim 31, wherein the act of applying a Wavelettransform comprises: storing in a period memory a period of a sine wavebeing applied to the D-A converter, determining an absolute value of asignal obtained as a result of the Wavelet transform, receiving anabsolute value signal and detecting a maximum value thereof.